Memory Controller Partial-Data Parity Update for Faster Writes
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Solution Overview
Problem
Current semiconductor memory systems face increased data read time and power consumption when partial data is changed, as they often require reading and recalculating parity using unmodified data, which is inefficient.
Innovation Solution
A memory controller method that calculates new parity using only the changed partial data, reducing the need to read and process unmodified data, thereby minimizing data read time and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all data is read to generate new parity bits when partial data is changed, then error correction capability is maintained, but data read time and power consumption increase
Solution Approach 1:
The patent segments the data into two parts: unchanged data and changed data. Only the changed data portion is read and processed for parity bit generation, while the unchanged data is reused from existing parity bits. This segmentation allows the system to maintain full error correction capability while significantly reducing the amount of data that needs to be read and processed.
Solution Approach 2:
Instead of performing a complete read and parity recalculation for all data, the patent applies partial action by only processing the specific portion of data that has changed. The unchanged portions are excluded from the read and calculation operations, thereby reducing time consumption while maintaining the necessary error correction functionality through selective processing.
2Reliability
If all data is read to generate new parity bits when partial data is changed, then data integrity is ensured, but power consumption increases
Solution Approach 1:
The patent divides the data processing task into segments: unchanged data segments are handled by reusing existing parity bits, while only the changed data segments require new parity bit generation. This segmentation reduces the computational workload and associated power consumption while maintaining data integrity through the combination of reused and newly generated parity information.
Solution Approach 2:
The patent changes the operational parameters of the parity generation process by adjusting the input data scope from 'all data' to 'only changed data'. This parameter change reduces the computational complexity and energy consumption of the parity bit generation process while maintaining the necessary data integrity through selective processing of relevant data portions.
3Reliability
If unchanged data is included in parity bit generation, then comprehensive error detection is achieved, but processing efficiency decreases
Solution Approach 1:
The patent segments the error detection and parity generation process to handle unchanged and changed data separately. Unchanged data maintains its original parity bits for error detection, while changed data generates new parity bits. This segmentation improves processing efficiency by avoiding redundant calculations on unchanged portions while maintaining comprehensive error detection capability through the combined parity information.
Data Source
AI summary
A partial data changing method of a memory controller includes receiving a request to change partial data from a host; detecting an error of old data, the old data being partial data read from a memory device using an error detection code; if the old data is not erroneous, calculating a data difference between new data provided from the host and the old data, and calculating a new parity using the data difference and an old parity read from the memory device; and storing the new data and the new parity at the memory device.


