Memory Controller Logic for Passive ECC Corruption Detection

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Solution Overview

Problem

Data storage devices with passive ECC functions face challenges in detecting data corruption without triggering the ECC function incorrectly, especially when data is received, as they rely on the ECC function being enabled after data reading, which can lead to incorrect ECC triggering due to manufacturing defects.

Innovation Solution

The method involves storing a data pair, where one data is normal and the other is encoded, in separate areas of the memory, allowing the memory controller to read and perform logic operations on both to generate an output signal indicating data corruption, thus enabling correct data retrieval without relying on ECC initially.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the ECC function is enabled only after receiving data (passive ECC), then the device complexity is reduced, but the reliability of data detection deteriorates due to inability to detect corruption before ECC activation

Engineering Contradiction:
ImproveECC function activation timingVSAvoiddata corruption detection accuracy
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-storing encoded data in the memory before normal data writing operations. This encoded data serves as a reference that can be used to detect data corruption before the ECC function is activated. The encoded data is prepared in advance and stored in a predetermined location, enabling corruption detection to occur prior to ECC function activation, thus resolving the contradiction between simplified device complexity and reliable data detection.

Inventive Principle:
Principle #10Preliminary action

2Ease of operation

If data is stored without ECC initially, then the ease of operation is improved, but the risk of incorrect ECC triggering increases due to manufacturing defects

Engineering Contradiction:
Improvedata storage simplicityVSAvoidECC function triggering accuracy
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent introduces an intermediary mechanism by storing encoded data that acts as a mediator between the normal data and the ECC function. This encoded data serves as an intermediate reference that can be compared against retrieved data to detect corruption. The intermediary encoded data allows the system to operate with simplicity while preventing incorrect ECC triggering, as it provides a reliable reference point for corruption detection before ECC activation.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If the ECC function is activated after data reading, then the device complexity is reduced, but the measurement precision of data corruption detection deteriorates

Engineering Contradiction:
ImproveECC activation timingVSAvoiddata corruption detection precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by pre-storing encoded data in the memory before normal data writing operations. This encoded data serves as a reference that can be used to detect data corruption before the ECC function is activated. The encoded data is prepared in advance and stored in a predetermined location, enabling corruption detection to occur prior to ECC function activation, thus resolving the contradiction between simplified device complexity and reliable data detection.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20230359522A1Method for controlling data storage device storing associated data in two areas
Publication Date: 2023.11.09 NAN YA TECH
  • US20230359522A1 patent drawing
  • US20230359522A1 patent drawing
  • US20230359522A1 patent drawing

AI summary

The present disclosure provides a method for controlling a data storage device. The method includes: storing a first data in a first area of a memory of the data storage device; storing a second data in a second area of the memory, wherein the second data is associated with the first; reading the first data and the second data via a first communication interface; and in response to the read first data and second data, generating a first output signal.