Memory Controller Plane-Index Cyclic Write for SSD Data Turnover
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Solution Overview
Problem
Existing data storage devices face inefficiencies in access operations due to the sequential writing of data across multiple memory dies and planes, leading to delayed data availability in logical order, which increases retention time in buffer memory and reduces data turnover rates.
Innovation Solution
A data processing method where a memory controller selects a target superblock and writes data in a cyclic manner across memory dies according to plane indices, ensuring that corresponding write operations on first pages of all memory dies are completed before those on second pages, allowing direct reading in logical order and reducing buffer retention time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is written sequentially across multiple memory dies and planes, then write operation simplicity is maintained, but data access efficiency deteriorates and buffer retention time increases
Solution Approach 1:
The patent segments the write operation into plane-specific stages, where data is written to all first planes of all memory dies before moving to second planes, and so on. This segmentation allows the system to maintain sequential write simplicity while enabling efficient parallel access across multiple dies, as data for the same logical address is distributed across different planes in a predictable pattern that optimizes read performance and reduces buffer retention time.
Solution Approach 2:
The patent performs preliminary organization of data during the write operation by distributing data portions to specific planes according to a predetermined pattern. This preliminary action ensures that when read operations occur, the data is already positioned optimally across memory dies and planes, eliminating the need for extensive buffering and reducing retention time without compromising write operation simplicity.
2Productivity
If data is written in cyclic manner across memory dies according to plane indices, then data turnover rate improves, but write operation complexity increases
Solution Approach 1:
The patent implements periodic action by cycling through memory dies in a fixed sequence according to plane indices. The write operation follows a repeating pattern where data is written to plane 0 of all dies, then plane 1 of all dies, and so on, creating a periodic structure that simplifies control logic while maximizing data turnover rate. This periodic approach transforms complex multi-die coordination into a simple repeating cycle.
Solution Approach 2:
The patent changes the parameter of write address distribution from traditional sequential ordering to plane-index-based cyclic ordering. By changing how data portions are mapped to physical locations (using plane indices as the organizing parameter), the system achieves higher data turnover rates without significantly increasing control complexity, as the mapping rule remains consistent and predictable.
3Reliability
If buffer memory is used to maintain logical data order, then data availability is ensured, but data turnover rate decreases
Solution Approach 1:
The patent extracts the need for extensive buffering by taking out the data reordering function from the buffer and implementing it at the write stage. Instead of writing data sequentially and then reordering it in the buffer, the system reorders data during the write operation itself by distributing it across planes and dies according to a pattern that naturally supports logical read order. This extraction reduces buffer size requirements and increases data turnover rate while maintaining data availability.
Solution Approach 2:
The patent performs preliminary data organization during the write operation, arranging data in a pattern that anticipates future read requirements. By preliminarily distributing data across memory dies and planes according to plane indices, the system ensures data is available in the correct logical order without requiring extensive buffering, thus maintaining reliability while improving turnover rate.
Data Source
AI summary
A data storage device includes a memory device and a memory controller. In response to a write command received from a host device, the memory controller performs a write operation to write predetermined data into the memory device. In the write operation, the memory controller selects one from multiple superblocks as a first target superblock of the write operation and sequentially writes the portions of the predetermined data into the pages of the first target superblock in a cyclic manner among memory dies according to an order of plane indices. Each memory die includes at least a first plane and a second plane. In the write operation corresponding to the predetermined data, corresponding write operations performed on a first page on the first plane of all memory dies are earlier than corresponding write operations performed on a first page on the second plane of all memory dies.