Memory Controller Power Down State Optimization

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Solution Overview

Problem

In multi-DIMM per channel configurations, activating On-Die Termination (ODT) during power down states leads to asynchronous operations, resulting in increased power consumption and performance degradation due to unpredictable timing uncertainties, impacting system efficiency.

Innovation Solution

Implementing a memory low power policy that utilizes a predictive algorithm to determine the next memory power states based on historical access data, allowing ranks to enter a Clock Enable Slow (CKEs) state, thereby reducing the activation of asynchronous ODT and minimizing performance impact, especially in systems with multiple DIMMs per channel.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If ODT is activated during power down state in multi-DIMM per channel configuration, then power consumption is reduced, but system performance degrades due to asynchronous operations

Engineering Contradiction:

Improvepower consumptionVSAvoidsystem performance

Core Design Contradiction:

Use of energy by stationary objectVSProductivity

Solution Approach 1:

The system performs preliminary actions by entering Precharge Power Down DLL off mode for DIMMs that will not be accessed in the near future, based on predictive algorithms analyzing historical access patterns. This allows the system to proactively reduce power consumption before performance degradation occurs, rather than reacting to performance issues after they arise.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamic power management by continuously monitoring memory access patterns and dynamically adjusting the power state of DIMMs. The system transitions between power down and active states based on real-time access predictions, allowing flexible adaptation to changing workload conditions rather than using a static power management approach.

Inventive Principle:

Principle #15Dynamics

2Use of energy by stationary object

If Precharge Power Down DLL off mode is used for multi-DIMM per channel, then power consumption is reduced, but asynchronous ODT operations cause performance impact

Engineering Contradiction:

Improvepower consumptionVSAvoidtiming uncertainty

Core Design Contradiction:

Use of energy by stationary objectVSReliability

Solution Approach 1:

The system employs feedback mechanisms where the memory controller continuously monitors actual memory access patterns and compares them against predictions. This feedback loop allows the system to adjust its power management decisions based on actual behavior, correcting any timing uncertainties and ensuring reliable operation while maintaining power savings.

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The patent changes key parameters such as the power state of DIMMs and the timing characteristics of ODT operations based on predictive algorithms. By adjusting these parameters dynamically according to access patterns, the system optimizes the balance between power consumption and timing reliability, resolving the contradiction between power savings and timing uncertainty.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS8719606B2Optimizing performance and power consumption during memory power down state

Publication Date: 2014.05.06 TAHOE RES LTD

AI summary

Methods and apparatus relating to optimization of performance and/or power consumption during memory power down state are described. In an embodiment, a memory controller may include logic to cause one or more ranks of a DIMM to enter a clock enable slow mode. Other embodiments are also described.