Memory Controller Power Loss Algorithm for Energy Reduction
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Solution Overview
Problem
As memory devices are designed to store increasingly more bits of information per cell, requiring more time and energy to program, the size and cost of energy storage structures to ensure successful programming operations during power loss events become significantly increased.
Innovation Solution
Implementing a power loss algorithm (PLA) in memory devices that reduces the energy required to complete interrupted programming operations by terminating high-energy programming and reprogramming data using a less energy-intensive SLC format to second and third memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory devices are designed to store increasingly more bits of information per cell, then data density is improved, but the time and energy required to program cells increases
Solution Approach 1:
The system changes the programming parameters by switching between different memory cell modes (SLC vs. high-density modes like MLC/TLC/QLC). When power loss is detected, the system transitions from high-density programming to SLC mode programming, which requires less energy per bit but achieves the same data recovery through alternative means
2Quantity of substance
If memory devices are designed to store increasingly more bits of information per cell, then data density is improved, but the size and cost of energy storage structures increases
Solution Approach 1:
The patent extracts the critical function of energy storage from large external structures and consolidates it into a small internal capacitor within the memory device. This internal capacitor is specifically sized to provide power only for the essential power loss algorithm operations, not for complete data programming, thereby dramatically reducing the required energy storage capacity
Solution Approach 2:
The system uses a small, inexpensive internal capacitor that may not provide sufficient energy for complete programming operations but is adequate for executing the power loss algorithm. The algorithm itself is designed to be energy-efficient and complete critical data recovery tasks before the capacitor is fully depleted
3Use of energy by stationary object
If power loss algorithm terminates high-energy programming operations, then energy storage requirements are reduced, but programming speed decreases
Solution Approach 1:
The system dynamically adjusts its programming strategy based on real-time power availability. During normal operation, it uses high-density modes for maximum speed and density. When power loss is detected, it dynamically switches to a different programming approach that prioritizes energy efficiency over speed, using the internal capacitor to complete critical operations
4Reliability
If power loss algorithm reprograms data to second and third memory cells, then data recovery is improved, but device complexity increases
Solution Approach 1:
The power loss algorithm segments the data recovery process into distinct phases: detecting power loss, identifying which data needs recovery, programming backup copies to second and third memory cells using SLC mode, and then resuming normal operations. This segmentation allows each phase to be optimized independently
Data Source
AI summary
Memory devices and methods for operating the same are described. The memory devices may include non-volatile memory having a plurality of memory cells, and a controller. The controller may be configured to begin a first programming operation configured to program a first one of the plurality of memory cells with more than one bit of information, terminate the first programming operation in response to detecting a power loss event, and program, with a second programming operation, second and third ones of the plurality of memory cells with the more than one bit of information.