Memory Controller Power-Off Timeout Management

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Sudden power off events in memory systems can prolong the time required to terminate operations due to the lengthy erase operation of flash memory devices, which is undesirable given the limited auxiliary power stored in auxiliary power devices.

Innovation Solution

Implementing a method that counts a first timeout to forcibly terminate operations, with the timeout set longer than the maximum times for read and program operations but shorter than the erase operation, allowing completion of these operations before resetting flash memory devices, and a second timeout for data dumping, ensuring efficient power-off management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory system waits for the erase operation to complete before terminating operations, then data integrity is maintained, but the power off time is significantly increased

Engineering Contradiction:
Improvedata integrityVSAvoidpower off time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by setting a timeout value before the erase operation completes. The memory controller preemptively terminates the erase operation when the timeout expires, rather than waiting for natural completion. This resolves the contradiction by sacrificing complete erase integrity (reliability) to achieve faster power-off (time reduction), which is acceptable since the auxiliary power is limited and cannot sustain long erase operations.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the timeout is set longer than read and program operation durations, then these operations can complete naturally, but the power off time increases due to erase operation constraints

Engineering Contradiction:
Improveoperation completionVSAvoidpower off time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies parameter changes by carefully selecting the timeout value to be longer than typical read and program operation durations but shorter than erase operation durations. This parameter optimization allows read and program operations to complete naturally (maintaining reliability) while forcing early termination of erase operations (reducing power-off time), thus resolving the contradiction through precise parameter tuning.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9355025B2Method of controlling memory system in the event of sudden power off
Publication Date: 2016.05.31 SAMSUNG ELECTRONICS CO LTD
  • US9355025B2 patent drawing
  • US9355025B2 patent drawing
  • US9355025B2 patent drawing

AI summary

A method of controlling a memory system that comprises a first flash memory device and a memory controller, the method comprising counting a first timeout when a sudden power off occurs, resetting the first flash memory device when the first timeout expires, and dumping data to the first flash memory device.