Memory Controller Power-Aware Scheduling for Resistive Memory

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Solution Overview

Problem

Next-generation resistive memory systems face challenges in managing power consumption to prevent degradation of quality of service (QoS) without significantly reducing performance, as existing power throttling methods can disrupt operations when power thresholds are exceeded.

Innovation Solution

A memory system with a memory controller that monitors power consumption and switches between performance-oriented and QoS-oriented scheduling schemes, using round-robin and first-come-first-served methods respectively, and stops command issuance when power consumption exceeds a certain threshold to prevent service degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If power throttling is applied to resistive memory to reduce power consumption and temperature, then power consumption is reduced, but quality of service (QoS) significantly degrades

Engineering Contradiction:
Improvepower consumptionVSAvoidquality of service
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies dynamics by making the scheduling scheme adaptive and changeable based on real-time power consumption conditions. The memory controller dynamically switches between different scheduling schemes (first scheme for low power, second scheme for high power) according to the monitored power state of the resistive memory, allowing the system to optimize both power consumption and QoS under varying conditions rather than using a fixed scheduling approach

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the scheduling parameter based on power consumption thresholds. When power consumption is below a first threshold, a performance-oriented scheduling scheme is used; when it exceeds the threshold, a QoS-oriented scheduling scheme is applied. This parameter change approach allows the system to maintain optimal balance between power efficiency and service quality by adjusting scheduling behavior according to power conditions

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If commands are blocked to resistive memory when power consumption exceeds threshold to reduce power, then power consumption is reduced, but operational performance decreases

Engineering Contradiction:
Improvepower consumptionVSAvoidoperational performance
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The system dynamically adjusts command scheduling based on power consumption levels. Instead of permanently blocking commands when power thresholds are exceeded, the controller switches to a QoS-oriented scheduling scheme that continues to process commands with appropriate prioritization, maintaining operational performance while managing power consumption dynamically

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The memory controller monitors power consumption in advance and proactively switches scheduling schemes before severe performance degradation occurs. By detecting power threshold violations early and adjusting the scheduling approach accordingly, the system prevents performance collapse while still managing power effectively

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11461022B2Memory system, memory controller, and operation method of memory controller for scheduling commands based on power consumption
Publication Date: 2022.10.04 SK HYNIX INC
  • US11461022B2 patent drawing
  • US11461022B2 patent drawing

AI summary

A memory system may comprise a memory; and a memory controller configured to issue, to the memory, commands scheduled in a first scheme when power consumption of the memory is less than a first threshold and commands scheduled in a second scheme when the power consumption is not less than the first threshold and less than a second threshold, and stop the issuance of the commands to the memory when the power consumption of the memory is not less than the second threshold.