Low Power Memory Controller Pseudo Open Drain Termination

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Solution Overview

Problem

DDR memory systems experience static power dissipation due to terminal resistors, which hinders the achievement of low power requirements in DRAM systems.

Innovation Solution

A memory controller is powered by two sources, with a terminal resistor only between the input/output pin and one power source, eliminating static current in the reading path by using a pseudo open drain terminator configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If terminal resistors are coupled in series between operation voltage and ground voltage for I/O pins, then signal transmission is stabilized, but static power dissipation increases

Engineering Contradiction:

Improvesignal transmission stabilityVSAvoidstatic power dissipation

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The patent divides the power supply into two separate power sources (first power source and second power source) instead of using a single series connection between operation voltage and ground voltage. This segmentation allows the terminal resistors to be connected only to the first power source, eliminating the continuous current path and reducing static power dissipation while maintaining signal transmission stability through proper termination.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent changes the power supply configuration from a single voltage reference (ground) to a dual power source system with different reference potentials. By adjusting the power supply parameters and creating a floating termination structure, the system achieves both signal stability and reduced static current consumption.

Inventive Principle:

Principle #35Parameter changes

2Manufacturing precision

If on-die termination voltage is set to half of operation voltage with series resistor configuration, then impedance matching is achieved, but static current increases per bit

Engineering Contradiction:

Improveimpedance matchingVSAvoidstatic current per bit

Core Design Contradiction:

Manufacturing precisionVSLoss of energy

Solution Approach 1:

The patent extracts the ground connection from the terminal resistor configuration, removing the continuous current path to ground. By taking out the ground reference and using only a single power source connection for termination, the system maintains impedance matching while eliminating the static current that would otherwise flow through the series resistor to ground.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of the conventional approach where terminal resistors connect between voltage and ground, the patent inverts the configuration by connecting terminal resistors only to the power source without a ground return path. This inversion creates a high-impedance state that prevents static current flow while still providing the necessary termination for signal integrity.

Inventive Principle:

Principle #13The other way round (Inversion)

Data Source

PatentUS8848462B2Low power memory controllers

Publication Date: 2014.09.30 HAMILCAR BARCA IP LLC

AI summary

A memory controller is provided. The memory controller is powered by first and second power source and includes an input/output pin, a driver circuit, a terminal resistor, and an input buffer. The driver circuit is coupled to the input/output pin and capable of providing to a writing signal to the input/output pin. The terminal resistor is coupled between the input/output pin and the first power source. The input buffer is coupled to the input/output pin and capable of receiving a reading signal from the input/output pin. No terminal resistor is coupled between the input/output pin and the second power source.