Memory Controller QoS Bandwidth IOPS Threshold Control

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Solution Overview

Problem

Current memory systems struggle to effectively control Quality of Service (QoS) for I/O access performance, particularly in shared SSD environments, where ensuring fair bandwidth and IOPS distribution among multiple hosts is challenging, leading to potential bottlenecks and inefficiencies.

Innovation Solution

A memory system with a controller that calculates and manages thresholds for data transfer rates and I/O operations per second, delaying completion responses and interrupts to regulate the flow of I/O commands, thereby controlling the quality of service by adjusting the timing of response transmissions and pausing command fetches to prevent exceeding predefined thresholds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the controller transmits completion responses immediately after processing I/O commands, then the I/O access performance and responsiveness are improved, but the bandwidth and IOPS may exceed predefined thresholds causing resource bottlenecks

Engineering Contradiction:
ImproveI/O access performanceVSAvoidQoS control stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The controller periodically calculates the amount of data transferred per unit time based on completion responses and compares it against predefined thresholds. This periodic monitoring and control mechanism ensures that bandwidth and IOPS remain within acceptable ranges while maintaining responsive I/O performance through timely completion response transmission when thresholds are not exceeded.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The controller implements a feedback mechanism where completion responses are transmitted to hosts, the amount of transferred data is calculated and monitored, and based on this feedback, the controller dynamically adjusts whether to transmit subsequent completion responses. This closed-loop control ensures QoS requirements are met while optimizing I/O performance.

Inventive Principle:
Principle #23Feedback

2Reliability

If the controller delays completion responses to control bandwidth, then the QoS is improved, but the I/O access latency increases

Engineering Contradiction:
ImproveQoS control stabilityVSAvoidI/O access latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The controller applies partial delay action by not delaying all completion responses uniformly. Instead, it selectively transmits completion responses based on whether the calculated transfer amount exceeds thresholds. This partial action approach minimizes latency for compliant I/O operations while still controlling bandwidth when necessary.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The controller periodically evaluates the transfer amount against thresholds rather than continuously delaying all responses. This periodic evaluation allows the system to maintain low latency during normal operations and only introduce delays when QoS thresholds are approached or exceeded.

Inventive Principle:
Principle #19Periodic action

3Measurement precision

If the controller monitors and calculates transfer amounts for every completion response, then the QoS control precision is improved, but the device complexity increases

Engineering Contradiction:
Improvetransfer amount measurement precisionVSAvoidcontroller complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The controller performs self-service by automatically calculating the amount of data transferred based on completion responses it already generates for performance monitoring purposes. This self-service approach enables precise QoS measurement without requiring separate monitoring systems or additional complex infrastructure.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The completion response structure serves multiple functions: it notifies hosts of I/O completion and provides the basis for calculating transferred data amounts for QoS control. This multi-functionality reduces device complexity by eliminating the need for separate measurement mechanisms while maintaining precise transfer amount monitoring.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Productivity

If multiple hosts share the SSD simultaneously, then the resource utilization is improved, but the bandwidth distribution fairness deteriorates

Engineering Contradiction:
Improveresource utilizationVSAvoidbandwidth distribution fairness
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The controller applies local quality control by individually monitoring and controlling the transfer amounts for each host separately. Each host's completion responses are evaluated against thresholds independently, ensuring fair bandwidth distribution among multiple hosts while maintaining high overall resource utilization through parallel I/O operations.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11983412B2Memory system controlling nonvolatile memory
Publication Date: 2024.05.14 KIOXIA CORP
  • US11983412B2 patent drawing
  • US11983412B2 patent drawing
  • US11983412B2 patent drawing

AI summary

According to one embodiment, a controller of a memory system calculates an amount of transferred data per unit time in response to completion of processing of a first I/O command. While the calculated amount of transferred data per unit time exceeds a first threshold, the controller does not transmit, to a host, a completion response indicating completion of the first I/O command. When the calculated amount of transferred data per unit time is equal to or less than the first threshold, the controller transmits, to the host, the completion response indicating the completion of the first I/O command.