Memory Controller RAID ECC Switching for Faster NAND Writes
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Solution Overview
Problem
Rewritable non-volatile memory modules face performance issues due to the time-consuming read verifying operations that occupy bandwidth and require additional ECC storage, affecting data writing efficiency.
Innovation Solution
Implementing a data writing method that executes a first programming operation with a lower RAID ECC rate, followed by a second programming operation with a higher RAID ECC rate for garbage collection, allowing for background verification without occupying bandwidth and minimizing ECC storage, thus improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read verifying operation is executed after programming data into each physical programming unit, then data correctness can be ensured, but programming performance is affected due to bandwidth occupation and time consumption
Solution Approach 1:
The patent applies preliminary action by executing the read verifying operation in advance during the host programming operation phase, rather than after garbage collection. This allows verification to be completed before the garbage collecting operation begins, preventing bandwidth occupation during critical data transfer phases and improving overall programming performance while maintaining data correctness
2Productivity
If read verifying operation is executed after garbage collecting operation, then bandwidth is freed for data writing, but incorrect data requires correction time that further affects performance
Solution Approach 1:
The patent executes the read verifying operation preliminarily during the host programming operation before garbage collection begins. This timing ensures that verification is completed while bandwidth is available, and any corrections can be made before data transfer becomes critical, eliminating both bandwidth occupation and correction time delays
3Stability of the object's composition
If same RAID ECC rate is used for both host programming and garbage collection, then consistency is maintained, but ECC storage capacity is insufficient for efficient garbage collection
Solution Approach 1:
The patent applies dynamics by making the RAID ECC rate adjustable based on the operation type. A first RAID ECC rate is used for host programming operations, while a second, different RAID ECC rate is used for garbage collection operations. This dynamic adjustment allows optimization of ECC storage capacity for garbage collection efficiency while maintaining appropriate consistency for each specific operation type
Data Source
AI summary
A data writing method, a memory control circuit unit and a memory storage device are provided. The method includes: executing a first programming operation to data according to a first RAID ECC rate, programming the data into at least a portion of a plurality of first physical programming units, and generating a first RAID ECC; and executing a second programming operation to the data programmed into at least the portion of the first physical programming units according to a second RAID ECC rate, programming the data into at least a portion of a plurality of second physical programming units, and generating a second RAID ECC, wherein the first RAID ECC rate is different from the second RAID ECC rate.