Memory Controller Randomization for NAND Flash Data Integrity

Solution Overview

Problem

The reliability of NAND flash memory systems is compromised due to repeated programming of the same cell data, particularly in blocks where firmware is stored, leading to reduced data integrity and increased probability of data patterns.

Innovation Solution

A memory controller implements a randomization process using a different randomization key for each erase operation to prevent the same cell data from being repeatedly programmed into the same memory cell, employing a pseudo-random number sequence and logical operations like XOR to randomize and de-randomize data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If firmware is repeatedly programmed into the same block, then firmware updates can be performed, but the same cell data is programmed repeatedly leading to reduced reliability

Engineering Contradiction:

Improvefirmware update capabilityVSAvoiddata integrity

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing an erase operation on the block before programming firmware data. This preliminary erase step ensures that previous data patterns are removed, preventing repeated programming of identical cell data while still enabling firmware updates. The erase operation is executed as a preparatory step that resets the block's data state.

Inventive Principle:

Principle #10Preliminary action

2Adaptability or versatility

If the same data is programmed into the same memory cell repeatedly, then firmware can be updated, but data pattern concentration increases reducing memory reliability

Engineering Contradiction:

Improvefirmware update capabilityVSAvoiddata pattern concentration

Core Design Contradiction:

Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary action by performing an erase operation on the block before programming firmware data. This preliminary erase step ensures that previous data patterns are removed, preventing repeated programming of identical cell data while still enabling firmware updates. The erase operation is executed as a preparatory step that resets the block's data state.

Inventive Principle:

Principle #10Preliminary action

3Adaptability or versatility

If firmware is stored in a block, then the block can be updated, but repeated programming reduces the block's lifespan

Engineering Contradiction:

Improvefirmware update capabilityVSAvoidblock lifespan

Core Design Contradiction:

Adaptability or versatilityVSDuration of action of stationary object

Solution Approach 1:

The patent applies preliminary action by performing an erase operation on the block before programming firmware data. This preliminary erase step ensures that previous data patterns are removed, preventing repeated programming of identical cell data while still enabling firmware updates. The erase operation is executed as a preparatory step that resets the block's data state.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS20250298534A1Memory system

Publication Date: 2025.09.25 KIOXIA CORP

AI summary

A memory system is connectable to a host. A memory system includes a non-volatile memory and a controller. The non-volatile memory includes a plurality of blocks, each of which is a unit of an erase operation. The controller is electrically connected to the non-volatile memory and controls the non-volatile memory. The controller receives first data from the host. The controller generates third data from the first data by randomizing the first data using second data that has a different value each time the data erase operation is executed on a first block among the plurality of blocks. The controller writes the second data to the non-volatile memory and the third data to the first block.