Memory Controller Read Bias Adjustment for ECC Fail Bits
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The threshold voltage distribution of memory cells in nonvolatile memory systems deteriorates, leading to increased error rates during data read operations, which can be exacerbated by factors like program-erase cycles and retention time, affecting the reliability of data retrieval and Error Correcting Code (ECC) decoding.
Innovation Solution
A memory controller that dynamically updates read biases based on ECC decoding results, including fail bit rates and standard deviations, to optimize data read operations and improve ECC decoding success rates by adjusting the read bias values in response to changes in threshold voltage distributions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read bias values are kept fixed for simplicity, then device complexity is reduced, but reliability deteriorates due to threshold voltage distribution changes
Solution Approach 1:
The patent implements dynamic read bias adjustment by updating read bias values based on ECC decoding results. The memory controller dynamically adapts read bias settings according to actual threshold voltage distribution changes, transitioning from fixed to variable read bias management to maintain optimal read reliability throughout the memory device lifecycle.
Solution Approach 2:
The patent establishes a feedback mechanism where ECC decoding results (fail bit rates, standard deviations) are used to automatically adjust read bias values. This closed-loop control system continuously monitors read performance and adjusts read bias settings accordingly, enabling self-optimization without external intervention.
2Reliability
If read biases are updated frequently to track threshold voltage changes, then reliability is improved, but productivity deteriorates due to increased processing overhead
Solution Approach 1:
The patent implements periodic read bias updates triggered by ECC decoding events rather than continuous updates. Read bias values are adjusted at specific intervals based on ECC decoding results, balancing the need for tracking threshold voltage changes with the requirement to maintain high data read throughput by avoiding excessive update frequency.
3Adaptability or versatility
If multiple read biases are maintained for different threshold voltage distributions, then adaptability is improved, but device complexity increases
Solution Approach 1:
The patent changes the parameter being monitored from raw read error counts to standardized metrics (fail bit rates and standard deviations). This parameter transformation enables more accurate tracking of threshold voltage distribution changes and more effective read bias adjustment, improving adaptability while managing complexity through mathematical standardization.
Data Source
AI summary
A memory system performs Error Correcting Code (ECC) decoding on data read from a plurality of target memory cells of a memory device, determines whether to update a read bias used in read operations of the memory device according to results of the ECC decoding, and then may update a value of the read bias based on result data produced by the ECC decoding and the number of data bits corrected by the ECC decoding, thereby optimizing the read bias value according to a change in a threshold voltage distribution of the memory cell, and increasing the likelihood of success of the ECC decoding.