Memory Controller Read Boost Mode Data Copying

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Solution Overview

Problem

Memory systems face challenges in processing read requests efficiently due to the difficulty in predicting usage patterns and requirements from hosts, as they lack knowledge of the properties set by the host and the speed of data storage devices.

Innovation Solution

A memory system and controller that include a first type memory block for storing data and a second type memory block operating at a higher speed, with a control circuit to determine if data can be copied from the first type to the second type block upon receiving a read boost mode command, allowing for faster data processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is stored in a first type memory block, then storage capacity is improved, but read speed deteriorates

Engineering Contradiction:
Improvestorage capacityVSAvoidread speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The memory device is segmented into multiple memory blocks with different types (first type and second type) having different performance characteristics. The control circuit divides the memory storage into segments that prioritize capacity in some blocks and speed in others, allowing selective access based on read boost mode requirements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different memory blocks are assigned different qualities or characteristics - the first type memory block is optimized for storage capacity while the second type memory block is optimized for read speed. This local differentiation allows the system to provide both high capacity and high speed read performance for specific data.

Inventive Principle:
Principle #3Local quality

2Speed

If a second type memory block operating at higher speed is introduced, then read speed is improved, but device complexity increases

Engineering Contradiction:
Improveread speedVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The control circuit is designed to handle multiple functions - it manages both the first type and second type memory blocks, determines when read boost mode is needed, and coordinates data access between different memory block types. This multi-functional control approach manages complexity through integration.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent employs copying of data or control information to manage complexity. The control circuit may copy metadata or access patterns to determine optimal data retrieval paths, and the system can replicate read operations to the faster second type memory block when needed without requiring complete system redesign.

Inventive Principle:
Principle #26Copying

3Speed

If data copying from first type to second type memory block is performed, then read speed is improved, but time consumption increases

Engineering Contradiction:
Improveread speedVSAvoidtime consumption
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The system performs preliminary determination by the control circuit to assess whether data should be copied to the second type memory block before actual read operations. This preliminary action filters out unnecessary copying operations, ensuring that time is not wasted copying data that will not be accessed or can be read directly from the first type memory block.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory access strategy is dynamic rather than static - the control circuit determines in real-time whether to copy data to the second type memory block based on current read boost mode requirements and access patterns. This dynamic adjustment optimizes the balance between copying time and read speed benefits.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12099751B2Memory system, memory controller and operating method of the memory system operating as read boost mode
Publication Date: 2024.09.24 SK HYNIX INC
  • US12099751B2 patent drawing
  • US12099751B2 patent drawing
  • US12099751B2 patent drawing

AI summary

A memory system, a memory controller, and an operating method of the memory system are provided. The memory system may include a memory device including a first type memory block and a second type memory block and a memory controller configured to determine, when receiving a command to set a read boost mode for the target logical address, whether the data corresponding to the target logical address can be copied from the first type memory block to the second type memory block, and copy the data corresponding to the target logical address from the first type memory block to the second type memory block.