Memory Controller Error Detection for Read Disturb Mitigation

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Solution Overview

Problem

NAND flash memories experience unintended data rewriting due to repeated read operations, known as the 'read disturb phenomenon,' which existing solutions fail to address effectively across all cell configurations, and error detection methods are inadequate for non-readout addresses.

Innovation Solution

A memory controller that performs error detection on both readout and non-readout addresses within a memory cell array, using a scan controller to select addresses for error detection and storing error information, thereby preventing the progression of the read disturb phenomenon.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error detection is performed only at readout addresses, then the detection method is simple and applicable to read operations, but errors at non-readout addresses cannot be detected and the read disturb phenomenon cannot be prevented

Engineering Contradiction:
Improveerror detection capabilityVSAvoidapplicability to different address types
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The error detection method is designed to be universally applicable to both readout addresses and non-readout addresses. The memory controller performs error detection at any address regardless of whether it is currently being read, making the detection mechanism versatile and effective against read disturb phenomena at any location in the memory cell array.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If consecutive read operations are performed in game machines, then program execution efficiency is improved, but unintended data rewriting occurs due to read disturb phenomenon

Engineering Contradiction:
Improveprogram execution efficiencyVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The memory controller implements a feedback mechanism where error detection results from reading program data are fed back to determine whether corrective actions are needed. When errors are detected at readout addresses during program execution, the system can respond by performing additional error detection at non-readout addresses or initiating error correction procedures, thus maintaining data integrity while allowing efficient program execution to continue.

Inventive Principle:
Principle #23Feedback

3Measurement precision

If existing error detection methods are used, then readout address errors can be detected, but non-readout address errors remain undetected until accessed

Engineering Contradiction:
Improveerror detection accuracyVSAvoiddelay in error detection
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system performs preliminary error detection at non-readout addresses proactively, before errors can propagate or affect subsequent operations. By detecting errors at addresses that will be accessed in the future, the system prevents delayed error detection and ensures that errors are caught early, maintaining both detection accuracy and timely response.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8504897B2Memory controller
Publication Date: 2013.08.06 MEGACHIPS
  • US8504897B2 patent drawing
  • US8504897B2 patent drawing
  • US8504897B2 patent drawing

AI summary

A memory controller carries out error detection on a wide range of area of a memory cell array, which includes not only readout addresses but also non-readout addresses. Thus, by carrying out error detection at an address at which an error occurs without accessing the address for readout, it is possible to detect occurrence of an error at the address. Accordingly, it is possible to prevent a “read disturb phenomenon” in which repetition of access to a readout address for readout may probably cause an error at a non-readout address other than the readout address.