Memory Controller Data Allocation for Read Latency
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Solution Overview
Problem
Current memory systems face inefficiencies in data redundancy and reliability due to the lack of effective methods for managing different read operations across mirrored storage regions, leading to varying latency and error probabilities.
Innovation Solution
A memory controller system that allocates data across principal and mirroring storage regions based on read operations, optimizing the number of reads by distributing data across regions with different read frequencies, thereby improving latency and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is stored in mirrored storage regions with the same read frequency, then data redundancy is achieved, but read latency increases and reliability is compromised
Solution Approach 1:
The patent segments the storage system into two distinct mirrored storage regions: a first mirrored storage region optimized for frequent reads and a second mirrored storage region optimized for infrequent reads. By dividing the storage resource and assigning different read frequency characteristics to each region, the system achieves both redundancy and optimized read latency based on access patterns
Solution Approach 2:
The patent applies local quality by assigning different operational characteristics to different parts of the mirrored storage system. The first mirrored storage region is configured with parameters optimized for frequent access (lower latency), while the second mirrored storage region is configured for infrequent access. This allows each region to have specialized properties matching its intended usage pattern
2Reliability
If data is duplicated across all storage regions, then data redundancy is maximized, but system complexity increases
Solution Approach 1:
The patent reduces system complexity by segmenting the mirroring strategy into two distinct regions rather than applying uniform mirroring across all storage. This segmented approach allows selective duplication only where needed, reducing unnecessary data copying and simplifying the management of mirrored data compared to comprehensive mirroring of all storage regions
Data Source
AI summary
A memory controller according to an embodiment includes a control circuit configured to duplicate and store data received from an external host device. The control circuit is configured to, when a write request specifying first data and a first logical address is received: i) allocate a first physical address corresponding to a first bit to the first logical address, and order a first memory device to write the first data to the first physical address; and ii) allocate a first mirroring physical address corresponding to a second bit to the first physical address, and order a second memory device to write the first data to the first mirroring physical address. A number of reads the first bit is different from a number of reads for the second bit.