Memory Controller Read-Notify Synchronization Mechanism
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Solution Overview
Problem
In systems with multiple processing units accessing a shared memory, existing synchronization methods using locks lead to out-of-order memory accesses and increased latency due to continuous polling, which generates substantial traffic and does not guarantee ordered access.
Innovation Solution
A data processing system where a first processing unit issues a read and notify request packet specifying a condition related to a variable, and the memory controller waits until the variable meets this condition, allowing the second processing unit to access and update the variable before the first processing unit, ensuring synchronized access and reducing unnecessary traffic by notifying the first unit when it's its turn to access the memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If processing units continuously poll the lock variable to check availability, then the lock mechanism can control access to shared memory, but this generates substantial traffic and increases latency between processing units and memory controller
Solution Approach 1:
The memory controller implements a feedback mechanism where it actively notifies waiting processing units when the lock becomes available. Instead of processing units continuously polling for status changes, the system sends feedback signals (notification packets) from the memory controller to waiting processors, eliminating the need for continuous polling traffic and reducing latency.
2Ease of operation
If processing units continuously poll the lock variable, then they can detect when the lock is available, but this generates substantial additional traffic through repeated request packets
Solution Approach 1:
The system replaces continuous polling with a feedback-based notification mechanism. The memory controller monitors the lock variable and sends notification packets to waiting processing units only when the lock becomes available, significantly reducing the quantity of traffic compared to continuous polling while maintaining ease of lock acquisition.
Solution Approach 2:
Instead of continuous polling action, the system uses periodic notification action - the memory controller periodically checks the lock state and sends notifications only when necessary (when the lock becomes available from a waiting state), reducing unnecessary traffic while maintaining operational ease.
3Reliability
If processing units use locks to prevent concurrent access, then shared memory access can be controlled, but out of order accesses cannot be guaranteed
Solution Approach 1:
The system implements preliminary action through the lock acquisition process itself. Before a processing unit can access the shared memory buffer, it must first acquire the lock by waiting for the lock variable to change from 0 to 1. This preliminary lock acquisition action guarantees that only one processing unit can access the buffer at a time, ensuring ordered access while maintaining control reliability.
Data Source
AI summary
A read and notify request is issued by a first processing unit to a lock manager on a different chip. A lock manager determines whether a condition specified by the request in relation to a variable for controlling access to a memory buffer is met. If the two are not equal, a notification request is registered until the variable changes. The second processing unit accesses the memory buffer and, when it has finished, updates the variable. If the variable then satisfies the condition specified by the read and notify request, the first processing unit is then notified by the lock manager and accesses the memory buffer. In this way, the first processing unit does not need to continually poll to determine when the variable has changed, but is notified when it is its turn to access the memory buffer.