Memory Controller Read Retry Management via RTC Timestamps

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Solution Overview

Problem

The performance of NAND flash memory and memory systems is degraded due to increasing read errors and shorter lifespan as a result of frequent read retry operations during data retrieval, necessitating a method to improve read performance and extend the lifespan of NAND flash memory.

Innovation Solution

A method involving a memory controller that uses real-time clock (RTC) values to determine the difference between program and read operations, controlling the maximum count of read retry operations and adjusting the initial read voltage level to minimize read errors, thereby enhancing read performance and extending the lifespan of NAND flash memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read retry operation is performed frequently to restore read errors, then read reliability is improved, but memory lifespan is shortened and overall performance is degraded

Engineering Contradiction:

Improveread reliabilityVSAvoidmemory lifespan

Core Design Contradiction:

ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent applies preliminary action by performing wear leveling during the programming phase. The controller identifies frequently accessed storage regions and proactively manages them before read errors occur, distributing wear patterns across different memory blocks. This prevents the need for frequent read retry operations that would otherwise accelerate memory degradation.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent changes operational parameters by adjusting read voltage levels and retry counts based on storage region characteristics and access patterns. The controller dynamically modifies these parameters to optimize between read reliability and memory lifespan, reducing aggressive read retry operations on regions that are already heavily utilized.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If read retry operation count is increased to handle read errors, then data retrieval reliability is improved, but system performance is degraded

Engineering Contradiction:

Improvedata retrieval reliabilityVSAvoidsystem performance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The controller performs preliminary wear leveling and identifies frequently accessed regions before read errors occur. By pre-managing these regions and distributing access patterns, the system reduces the need for time-consuming read retry operations, thereby maintaining higher system performance while ensuring data retrieval reliability.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent replaces mechanical read retry operations with a software-based wear leveling algorithm. Instead of repeatedly attempting physical read operations on degraded memory cells, the controller uses logical address translation and data redistribution to bypass problematic regions, significantly reducing the time and computational overhead associated with read retries.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Quantity of substance

If manufacturing process of NAND flash memory is refined to increase capacity, then storage density is improved, but lifespan becomes shorter and read errors increase

Engineering Contradiction:

Improvestorage densityVSAvoidread error rate

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting read voltage levels and operational parameters based on the specific characteristics of refined NAND flash memory. The controller monitors read error rates and modifies voltage thresholds and timing parameters to compensate for the reduced tolerance of high-density memory cells, thereby maintaining reliability despite increased storage density.

Inventive Principle:

Principle #35Parameter changes

4Measurement precision

If read retry operation is performed to restore read errors, then data accuracy is improved, but operation time increases

Engineering Contradiction:

Improvedata accuracyVSAvoidoperation time

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The controller performs preliminary wear leveling and identifies frequently accessed regions before read errors occur. By pre-managing these regions and maintaining optimal read parameters, the system minimizes the need for time-consuming read retry operations, thereby reducing operation time while preserving data accuracy.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS8990535B2Method for operating memory controller, and memory system including the same

Publication Date: 2015.03.24 SAMSUNG ELECTRONICS CO LTD

AI summary

A method for operating a memory controller capable of controlling a maximum count of a read retry operation is disclosed. The method includes programming a first real time clock (RTC) value indicating a time-of-day when a program operation is performed when the program operation for programming a data to a storage region of a non-volatile memory, obtaining information for the storage region by using the first RTC value read from the non-volatile memory and a second RTC value indicating a time-of-day when a read operation is performed, when the read operation for the data programmed to the storage region is performed, and decreasing a maximum count of a read retry operation by using the information, when the read retry operation is performed for the storage region.