Memory Controller Read Verification via Write Reliability Index

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Solution Overview

Problem

Current memory systems face inefficiencies in data writing and reading operations due to the need for extensive read verification, which can prolong processing time and reduce throughput, as the success or failure of write operations cannot be determined until read verification is completed, leading to potential data buffer delays and increased writing time.

Innovation Solution

A memory system that generates a write reliability index based on the progress of data writing, allowing the memory controller to determine whether to perform read verification only when the write reliability is insufficient, thereby reducing unnecessary read verifications and improving data writing throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read verification is performed for all write operations, then data reliability is improved, but processing time increases and throughput decreases

Engineering Contradiction:
Improvedata reliabilityVSAvoidthroughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent changes the parameter of verification frequency from fixed (always verify) to variable (verify only when reliability index indicates potential issues). The memory controller dynamically adjusts read verification execution based on the write reliability index, which is calculated from program operation characteristics such as the number of program loops and verification results, thereby resolving the contradiction between maintaining high data reliability and achieving high throughput.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If read verification is performed for all write operations, then data reliability is improved, but processing time increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The verification execution parameter is changed from static to dynamic based on write reliability assessment. The memory controller calculates a write reliability index during the program operation and uses this index to determine whether read verification is necessary, thereby reducing unnecessary verification time while maintaining data reliability for problematic writes.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts the decision-making function for verification execution from the fixed verification process. By calculating the write reliability index separately and using it to conditionally trigger read verification, the system separates reliable writes (that don't need verification) from unreliable writes (that do need verification), thus reducing overall processing time while maintaining reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If write reliability index calculation is performed, then read verification can be optimized, but device complexity increases

Engineering Contradiction:
Improvewriting throughputVSAvoidcontrol complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory controller performs multiple functions using the same program operation data: it both completes the write operation and calculates the write reliability index from the same program loop count and verification result information. This multi-functionality approach allows reliability assessment without adding separate measurement hardware or complex external monitoring systems.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory device itself generates the write reliability index during its normal program operation by monitoring its own verification results and program loop characteristics. The device serves its own reliability assessment needs internally, eliminating the need for external complex monitoring equipment and reducing overall system complexity while improving throughput.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12183398B2Memory system with semiconductor storage device and memory controller for performing read verification
Publication Date: 2024.12.31 KIOXIA CORP
  • US12183398B2 patent drawing
  • US12183398B2 patent drawing
  • US12183398B2 patent drawing

AI summary

A memory system includes a memory controller and a semiconductor storage device. The semiconductor storage device performs a program operation of performing a software program loop including applying a write voltage to a word line, performing program verification for performing write determination of a first data value, and increasing a set value of the write voltage if determining that writing of the first data value is not completed, and generates an index based on first information obtained according to a progress of writing the first data value in the program operation. The memory controller determines whether to perform read verification of reading data from the plurality of memory cells based on the index.