Memory Controller Read-Verify for Faster Data Integrity Checks
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Solution Overview
Problem
Existing read-verify operations in non-volatile memory devices are slow and hardware-intensive due to the need to transfer large amounts of data to the host device for verification, which is costly and time-consuming, especially in scenarios involving data integrity checks.
Innovation Solution
Implementing a read-verify command within the memory device's controller to verify chunks of data without transferring them to the host device, using error correcting codes and logical block maps to determine pass-fail status, reducing the need for extensive data transfer and hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is transferred to the host device for verification, then data integrity can be checked, but verification time and hardware costs increase significantly
Solution Approach 1:
The patent extracts the verification function from the host device and relocates it to the memory device controller. The controller performs error detection and verification operations locally on the data chunks without requiring transfer to the host, thereby maintaining data integrity verification capability while eliminating the time penalty of data transfer.
Solution Approach 2:
The controller acts as an intermediary between the memory array and the host device. It receives read commands, retrieves data chunks, performs verification using error detecting codes, and only transfers verified data or verification results to the host, thereby preventing unnecessary data transfer while ensuring integrity checks are performed.
2Reliability
If data is transferred to the host device for verification, then data integrity can be checked, but hardware costs and complexity increase
Solution Approach 1:
The memory device controller performs verification operations on its own behalf without requiring the host device to provide verification hardware or software. The controller uses error detecting codes stored in the memory array to verify data integrity locally, making the system self-sufficient for verification tasks and reducing overall hardware complexity.
Solution Approach 2:
The verification functionality is implemented as software or firmware within the controller rather than requiring dedicated hardware verification circuits. This allows the complex verification logic to be replicated through programmable instructions, reducing hardware complexity while maintaining verification capability.
3Productivity
If verification is performed without data transfer, then verification time is reduced, but verification capability must be implemented within the memory device
Solution Approach 1:
The verification process is segmented into discrete operations: reading data chunks, retrieving error detecting codes, performing verification comparisons, and generating results. This segmentation allows the controller to efficiently manage verification tasks in steps, improving throughput while keeping each individual operation simple and manageable.
Solution Approach 2:
Error detecting codes are calculated and stored in the memory array during the data writing phase, before verification is needed. This preliminary action prepares the verification data in advance, allowing the controller to perform rapid verification operations without needing to perform complex calculations during the verification phase itself, thereby improving throughput.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces verification time and hardware costs while enhancing system diagnostic capabilities and production throughput by performing data integrity checks efficiently within the memory device.
Implementation Method 1
A programming operation (sometimes called a write operation) of the memory cell is generally accomplished by grounding the source and the drain areas of the memory cell and the semiconductor substrate of a bulk area, and applying a high positive voltage, which may be referred to as a 'program voltage,' a 'programming power voltage,' or 'VPP,' to a control gate to generate Fowler-Nordheim tunneling (referred to as 'F-N tunneling') between a floating gate and the semiconductor substrate.
Data Source
AI summary
In some implementations, a memory device may include a memory and a controller. The controller may receive, from a host device, a read-verify command. The controller may obtain, from the memory, a chunk of data based on the read-verify command. The controller may verify, based on the read-verify command, the chunk of data without transferring the chunk of data to the host device. The controller may provide, to the host device, an indication of a pass-fail status of the chunk of data based on the verification of the chunk of data.