Memory Controller Read Voltage Adjustment for NAND Flash
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Solution Overview
Problem
Current memory systems face challenges in accurately reading data from NAND flash memory due to fluctuations in threshold voltage distributions, leading to errors in data retrieval and correction, especially when considering the influence of adjacent memory cells.
Innovation Solution
The memory system employs a combination of history read, shift read, single-state read, and retry read operations, along with soft-decision bit decoding using LLR tables, to adjust read voltages and account for the influence of adjacent memory cells, thereby improving data correction accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional read operations are used, then read speed is maintained, but data retrieval accuracy deteriorates due to threshold voltage fluctuations and adjacent cell interference
Solution Approach 1:
The patent segments the read operation into multiple distinct phases: history read operation to capture initial state, shift read operation to apply voltage adjustments, and retry read operation to verify and correct data. This segmentation allows each phase to address specific aspects of threshold voltage variability and adjacent cell interference independently, improving overall data retrieval accuracy without creating a monolithic complex operation.
Solution Approach 2:
The history read operation serves as a preliminary action that captures the initial threshold voltage state before actual data reading. By performing this preliminary measurement and storing the result, the system can later reference this baseline information during retry read operations to compensate for voltage fluctuations and interference effects, thereby improving accuracy without requiring complete re-reading of data.
2Measurement precision
If multiple read operations are performed to improve accuracy, then data retrieval accuracy improves, but read time increases
Solution Approach 1:
The patent implements a dynamic read strategy where the system adaptively determines whether to perform additional shift read and retry read operations based on the results of the initial history read. If the initial read meets accuracy thresholds, the process terminates early; if not, additional operations are triggered. This dynamic approach optimizes read time by avoiding unnecessary operations while ensuring accuracy when needed.
Solution Approach 2:
The retry read operation incorporates feedback mechanisms where the results of preliminary reads inform subsequent read operations. The system uses the history read results to determine appropriate voltage shifts and whether additional reads are necessary, creating a feedback loop that optimizes the balance between read time and accuracy by only performing additional operations when the feedback indicates errors or uncertainties.
Data Source
AI summary
A memory system includes: a nonvolatile memory and a memory controller. The nonvolatile memory includes: a first memory cell and a second memory cell each configured to store data and coupled in parallel to a bit line, a first word line coupled to the first memory cell, and a second word line coupled to the second memory cell and differing from the first word line. The first and second memory cell face each other between the first word line and the second word line. The memory controller is configured to read first data from the first memory cell, read second data from the second memory cell, and decode data stored in the first memory cell based on the first data and the second data.