Memory Controller Read Voltage Selection for Flash Error Correction

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Solution Overview

Problem

Flash memory devices with reduced read margin between program states generate error bits during data read operations, which existing error correction methods struggle to correct effectively, leading to uncorrectable errors.

Innovation Solution

A method involving a default read operation followed by multiple low-level read operations using different read voltage sets to generate raw data, with error correction and selection of a starting voltage set to perform high-level read operations, thereby correcting errors and improving data reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple low-level read operations with different voltage sets are performed to improve error correction, then the error correction ratio is improved, but the read operation time increases

Engineering Contradiction:
Improveerror correction ratioVSAvoidread operation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs low-level read operations using different voltage sets before the high-level read operation to preliminarily identify error patterns and select an appropriate starting voltage set. This preliminary action enables the system to prepare optimal read parameters in advance, improving error correction capability while managing the overall read time efficiently.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The read operation is segmented into multiple stages: low-level read operations with different voltage sets, error analysis, starting voltage set selection, and high-level read operation. This segmentation allows the system to apply different processing strategies at each stage, optimizing both error correction and time management.

Inventive Principle:
Principle #1Segmentation

2Speed

If multiple low-level read operations are performed to select an optimal starting voltage set, then the operating speed of high-level read operations is improved, but the overall read time increases

Engineering Contradiction:
Improveoperating speed of high-level read operationsVSAvoidoverall read time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The system performs preliminary low-level read operations to identify and select the optimal starting voltage set before executing the high-level read operation. This preliminary characterization of the memory state enables faster and more accurate high-level reads, as the system avoids unnecessary voltage adjustments during the critical high-level read phase.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The starting voltage set is dynamically selected based on the results of low-level read operations and error analysis. Rather than using a fixed voltage set, the system adapts the starting voltage set according to the actual memory state, improving the efficiency of subsequent high-level read operations.

Inventive Principle:
Principle #15Dynamics

3Reliability

If error correction is performed multiple times with different voltage sets, then data reliability is improved, but the processing complexity increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidprocessing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The error correction process is segmented into distinct phases: low-level reads with different voltage sets, error analysis and starting voltage set selection, and high-level read with error correction. Each phase has a specific function and operates independently, making the overall complex process more manageable and systematic.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system uses feedback from low-level read operations and error analysis to determine the optimal starting voltage set for high-level reads. This feedback mechanism allows the system to automatically adjust read parameters based on actual performance, improving data reliability while maintaining a structured approach to error correction.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9766973B2Operating method of memory controller and nonvolatile memory device
Publication Date: 2017.09.19 SAMSUNG ELECTRONICS CO LTD
  • US9766973B2 patent drawing
  • US9766973B2 patent drawing
  • US9766973B2 patent drawing

AI summary

A default read operation is performed on a page using a default read voltage set to generate default raw data. If error bits of the default raw data are not corrected, a plurality of low-level read operations is performed on the page using a plurality of read voltage sets to generate a plurality of low-level raw data. Each read voltage set is different from the default voltage set. A read voltage set is selected from the plurality of read voltage sets as a starting voltage set, according to each low-level raw data. A high-level read operation using the selected starting voltage set is performed on the page to generate high-level raw data.