Memory Controller Read-Voltage Tracking for Nonvolatile Memory Reads
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Solution Overview
Problem
Existing memory systems face challenges in maintaining optimal read voltages due to variations in threshold voltage distributions of memory cell transistors, leading to increased fail bits and reduced data correction efficiency.
Innovation Solution
A memory system with a memory controller that performs a patrol process to determine and update shift amounts for read voltages, using both system and on-chip tracking processes to adjust read operations based on error correction outcomes, thereby optimizing data retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed read voltages are used in memory systems, then device complexity is reduced, but threshold voltage variations cause increased fail bits and reduced data correction efficiency
Solution Approach 1:
The patent implements dynamic read voltage adjustment by introducing tracking processes (both system tracking and on-chip tracking) that continuously monitor and update read voltages based on threshold voltage distribution variations. This transforms the static voltage application into a dynamic adaptation mechanism, resolving the contradiction between maintaining fixed simple voltages and achieving reliable data correction under varying conditions
Solution Approach 2:
The patent employs feedback mechanisms through the tracking process that monitors read outcomes and uses this information to adjust subsequent read voltages. The system tracking uses read data to update voltage shift amounts, and the on-chip tracking provides real-time feedback within the memory device, creating a closed-loop system that improves data correction efficiency while managing complexity through intelligent control
2Measurement precision
If tracking processes are executed to optimize read voltages, then data read accuracy improves, but operating time increases due to additional processing steps
Solution Approach 1:
The patent performs preliminary voltage optimization through the tracking process that proactively adjusts read voltages before actual data read operations. By pre-calculating and storing optimal voltage shift amounts in lookup tables or registers, the system prepares the optimal read parameters in advance, reducing the time penalty during actual data access operations
Solution Approach 2:
The on-chip tracking process enables the memory device to self-adjust its read voltages autonomously without requiring external controller intervention for every voltage adjustment. This self-service mechanism reduces the time overhead by handling voltage optimization internally within the memory device, minimizing communication latency and processing delays
3Reliability
If read voltages are dynamically adjusted based on threshold voltage distributions, then fail bit reduction is achieved, but device complexity increases due to additional tracking processes
Solution Approach 1:
The patent segments the voltage adjustment functionality into two distinct tracking processes: system tracking implemented in the external controller and on-chip tracking implemented within the memory device. This segmentation distributes the complexity across different levels, allowing each component to handle a portion of the tracking burden, thereby reducing the complexity impact on any single component while achieving comprehensive fail bit reduction
Solution Approach 2:
The patent introduces lookup tables and voltage shift amount registers as intermediary structures that store pre-calculated optimal voltage adjustments. These intermediaries decouple the complex threshold voltage distribution analysis from the actual read operation, allowing the system to benefit from dynamic voltage adjustment without directly implementing complex real-time calculation logic in the critical data path
Data Source
AI summary
A memory system includes a nonvolatile memory and a memory controller. The memory controller is configured to: execute a first tracking process to determine a value of a first voltage in a patrol process that is carried out independently of a request from a host, execute a first data read process to read first data from the nonvolatile memory in response to receiving a read request from the host, cause the nonvolatile memory to execute a second tracking process using the first voltage when error correction of the first data fails, receive a value of a second voltage from the nonvolatile memory as a result of the second tracking process, and execute a second data read process using the second voltage to read second data from the nonvolatile memory.