Memory Controller Redundant Logical Domain Address Translation
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Solution Overview
Problem
Double address translation in existing memory systems, which includes both host-side and device-side address translation, reduces I/O performance and complicates data redundancy in non-volatile memory systems like SSDs.
Innovation Solution
A memory system with a controller that creates virtual storage domains across multiple memory dies, allowing data to be written redundantly across multiple virtual devices, eliminating the need for double address translation by directly translating logical addresses to physical addresses within the host.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If double address translation is implemented (host-side and device-side), then data redundancy can be achieved, but I/O performance deteriorates
Solution Approach 1:
The patent extracts and eliminates the device-side address translation table, retaining only the host-side translation. This reduces the translation overhead from double translation to single translation, thereby improving I/O performance while maintaining data redundancy capabilities through alternative means (such as logical domain mapping without requiring device-side translation tables).
Solution Approach 2:
The patent merges the address translation function entirely into the host side, eliminating the need for separate device-side translation. The host manages the mapping between logical addresses and physical addresses, and the device simply executes write operations to the translated physical addresses, thus reducing system complexity and improving performance.
2Reliability
If double address translation is implemented, then data redundancy can be achieved, but system complexity increases
Solution Approach 1:
The patent removes the complex device-side address translation table and logic from the storage device. This extraction simplifies the device architecture significantly, as the device no longer needs to maintain or process address translations, reducing both hardware complexity and software overhead while the host assumes full translation responsibility.
Solution Approach 2:
The host acts as an intermediary that handles all address translation operations before commands reach the device. This intermediary role consolidates the translation function in one location (the host) rather than distributing it between host and device, thereby reducing overall system complexity and eliminating the need for coordinated double translation.
Data Source
AI summary
A memory system includes a nonvolatile memory including memory dies, and a controller. The controller is configured to create a first virtual storage with a first part of the memory dies and a second virtual storage with a second part of the memory dies, and create a redundant logical domain spanning one or more memory dies corresponding to the first virtual storage and one or more memory dies corresponding to the second virtual storage. The memory controller is configured to, in response to a write command, store write data corresponding to the write command in a first region of the first virtual storage and in a second region of the second virtual storage, and return to the host a response including a first physical address of the first region and a second physical address of the second region.