Memory Controller Refresh Control Using Device-Specific Leakage Current
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Solution Overview
Problem
Current memory systems perform uniform refresh operations on semiconductor memory devices despite varying refresh characteristics, leading to inefficient power consumption and performance issues due to unnecessarily short refresh intervals for devices with good refresh characteristics.
Innovation Solution
A memory system with a memory controller that generates special commands to retrieve and utilize refresh information specific to each semiconductor memory device, allowing for tailored refresh operations based on individual device characteristics, thereby optimizing refresh intervals and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If uniform refresh operations are performed on all semiconductor memory devices, then refresh reliability is ensured for the worst-case device, but power consumption increases due to unnecessarily short refresh intervals for devices with good refresh characteristics
Solution Approach 1:
The patent applies local quality by configuring different refresh intervals for different semiconductor memory devices based on their individual refresh characteristics. Each device is assigned a refresh interval tailored to its specific leakage current properties, rather than applying a uniform refresh interval to all devices. This allows devices with good refresh characteristics to operate with longer intervals (lower power) while devices with poor characteristics maintain shorter intervals (higher reliability).
Solution Approach 2:
The patent changes the refresh interval parameter dynamically based on the refresh characteristics of each semiconductor memory device. The memory controller reads refresh characteristic information from each device and configures appropriate refresh intervals, transforming the fixed uniform refresh approach into a variable parameter approach that adapts to individual device properties, thereby optimizing the balance between reliability and power consumption.
2Reliability
If refresh operations are performed based on the worst-case refresh characteristic, then all devices are refreshed reliably, but performance decreases due to inefficient use of refresh resources for devices with good characteristics
Solution Approach 1:
The patent implements local quality by assigning different refresh intervals to different semiconductor memory devices according to their specific refresh characteristics. Instead of applying a single worst-case refresh interval to all devices, each device receives a customized refresh configuration that matches its actual leakage current properties. This optimization improves overall system performance by reducing unnecessary refresh operations on devices that don't require them, while maintaining adequate refresh frequency for devices that do need frequent refreshing.
3Use of energy by moving object
If individualized refresh intervals are configured for each semiconductor memory device, then power consumption is reduced and performance is improved, but system complexity increases due to additional control mechanisms
Solution Approach 1:
The patent applies self-service by having each semiconductor memory device provide its own refresh characteristic information to the memory controller. The devices essentially serve themselves by reporting their leakage current properties, which the controller then uses to determine appropriate refresh intervals. This approach reduces the need for complex external characterization equipment or manual configuration, as the devices self-report their requirements, thereby limiting the increase in system complexity while still enabling individualized refresh control.
Data Source
AI summary
A memory system and a refresh control method thereof are provided. The memory system includes a semiconductor memory device including a plurality of memory cells and a memory controller configured to generate a special command for searching for refresh information stored in the semiconductor memory device and to control a refresh operation of the semiconductor memory device. The semiconductor memory device is configured to output the refresh information to the memory controller in response to the special command generated by the memory controller.