Memory Controller Temperature-Aware Refresh for NAND Flash Reliability

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Solution Overview

Problem

The existing memory systems face challenges in maintaining data reliability due to variations in threshold voltage distributions caused by temperature differences between write and read processes in NAND flash memory, leading to increased error bits that exceed the correction capability of error correction circuits.

Innovation Solution

A memory system that includes a non-volatile NAND flash memory and a memory controller, which manages temperature information and refresh processes by setting low-temperature flags and threshold values to determine when to reserve refresh operations, thereby minimizing the impact of temperature variations on data reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is written in NAND flash memory at low temperature and read at high temperature, then the threshold voltage distribution varies causing increased error bits, but executing refresh processes for all data increases system complexity and processing time

Engineering Contradiction:
Improvedata reliabilityVSAvoidrefresh process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by managing refresh processes differently based on temperature conditions. Specifically, data written at low temperature is identified and subjected to refresh operations when temperature rises, while data written at normal temperature follows standard refresh protocols. This localized approach targets only the affected data portions rather than applying uniform refresh to all data, thereby maintaining reliability for temperature-sensitive data without unnecessarily complicating the overall system.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements preliminary action by proactively identifying data written at low temperature and scheduling refresh operations before error bits accumulate beyond correction capability. The memory controller monitors write temperature conditions and preemptively triggers refresh processes when temperature thresholds are crossed, preventing reliability degradation rather than reacting after errors occur. This anticipatory approach maintains data integrity while avoiding excessive refresh operations.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If refresh processes are executed frequently to maintain data reliability under temperature variations, then data reliability improves, but processing time and system productivity decrease

Engineering Contradiction:
Improvedata reliabilityVSAvoidsystem processing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by selectively executing refresh processes only on data that was written at low temperature and is now being accessed at high temperature. The memory controller identifies specific data blocks requiring refresh based on temperature conditions during write operations, rather than performing blanket refresh on all stored data. This targeted approach maintains data reliability for vulnerable data while minimizing interference with normal read/write operations and overall system productivity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements partial action by performing refresh operations on only a subset of data blocks—specifically those written at low temperature—rather than executing refresh on all data. This partial refresh strategy is sufficient to maintain reliability for the affected data while avoiding the productivity penalty of comprehensive refresh operations. The memory controller balances the degree of refresh action with the actual reliability needs based on temperature history.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11710515B2Memory system
Publication Date: 2023.07.25 KIOXIA CORP
  • US11710515B2 patent drawing
  • US11710515B2 patent drawing
  • US11710515B2 patent drawing

AI summary

According to one embodiment, a memory system includes a non-volatile memory and a memory controller. The non-volatile memory includes a plurality of groups, each including a plurality of memory cells. The memory controller is configured to determine whether to execute a refresh process for a first group based on whether a first temperature in a write process for the first group and a second temperature after the write process for the first group satisfy a first condition.