Memory Controller Refresh Without Temporary Storage

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing memory technologies require temporary data preservation areas for refresh operations, leading to increased memory chip size and potential data corruption in non-volatile memories, particularly in ReRAMs, due to the need for frequent re-write operations.

Innovation Solution

A memory controller that tracks the number of write operations per page or block and performs refresh operations based on this data, reversing bit values during writing to prevent corruption without the need for temporary data preservation, thereby reducing memory chip size and preventing data loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If temporary data preserving areas are used for refresh operations, then data corruption is prevented, but memory chip size increases

Engineering Contradiction:
Improvedata integrityVSAvoidmemory chip size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the refresh operation with the normal write operation by performing bit reversal during the write process itself. The memory controller reverses bits of data before writing to memory cells, which simultaneously serves as both a write operation and a refresh operation, eliminating the need for separate temporary storage areas.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The write operation is given multiple functions: it not only stores data but also performs refresh by reversing bits. This multi-functionality allows the same hardware resources to serve dual purposes, preventing data corruption without requiring additional dedicated refresh storage areas.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If frequent refresh operations are performed, then data corruption is prevented, but write operations increase

Engineering Contradiction:
Improvedata integrityVSAvoidwrite operation frequency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent combines refresh and write operations into a single process. By reversing bits during the write operation, the system performs refresh without requiring separate write cycles, thus not increasing the overall write operation frequency.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent converts the potentially harmful effect of frequent writing into a benefit by making the write operation itself serve as the refresh mechanism. The act of writing reversed data becomes the means to prevent data corruption, turning what could be a productivity-reducing factor into a reliability-enhancing feature.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS9978448B2Memory controller, storage device, information processing system, and memory controlling method
Publication Date: 2018.05.22 SONY GROUP CORP
  • US9978448B2 patent drawing
  • US9978448B2 patent drawing
  • US9978448B2 patent drawing

AI summary

To perform refresh without saving data, and prevent corruption of data in non-volatile memories. A number-of-write-operations information holding unit holds number-of-write-operations information, which is the number of write operations of a non-volatile memory to which access is made in units of pages which are divided by a page size. A determination unit determines whether or not refresh, which is reversing of values of all memory cells constituting the pages, is necessary on the basis of the held number-of-write-operations information. A write control unit further performs the refresh in addition to writing when the refresh is necessary on the basis of a result of the determination at a time of the writing with respect to the pages.