Memory Controller Workload-Adaptive Refresh for DRAM Power

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Solution Overview

Problem

The existing refresh operations in memory devices, such as DRAM, lead to increased current consumption and reduced performance due to the need for periodic data recharging in capacitors, which results in data loss.

Innovation Solution

A memory system with a workload monitoring unit that adjusts the refresh command based on workload conditions, applying a per-bank refresh command during high workloads and an all-bank refresh command during low workloads to optimize current consumption and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a refresh operation is performed periodically to maintain data integrity in memory cells, then data integrity is improved, but current consumption increases

Engineering Contradiction:
Improvedata integrityVSAvoidcurrent consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The refresh operation transitions from a static periodic execution to a dynamic workload-dependent execution. The memory controller monitors workload conditions and adjusts refresh frequency accordingly, performing frequent refreshes during low workload periods and reducing refresh frequency during high workload periods, thereby optimizing the balance between data integrity and current consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The refresh operation parameters (frequency, scope) are changed based on workload conditions. During low workload, full-bank refreshes are performed at standard intervals to ensure data integrity. During high workload, the refresh frequency and scope are adjusted to reduce current consumption while maintaining acceptable data integrity through selective refresh operations.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a refresh operation is performed periodically to prevent data loss, then data integrity is improved, but performance of the memory device is reduced

Engineering Contradiction:
Improvedata integrityVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The refresh operation schedule becomes dynamic based on workload conditions. During high workload periods, refresh operations are adjusted to minimize their impact on performance by reducing refresh frequency and scope. During low workload periods, full refresh operations are performed to ensure data integrity without significantly impacting overall system performance.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Instead of always performing complete refresh operations on all memory banks, the system applies partial refresh operations during high workload periods, refreshing only critical or recently accessed data. This partial action approach maintains acceptable data integrity while reducing the performance penalty associated with full refresh operations.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If refresh operations are performed frequently to ensure data integrity, then data integrity is improved, but current consumption and performance are reduced

Engineering Contradiction:
Improvedata integrityVSAvoidcurrent consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The refresh operation parameters are dynamically changed based on workload monitoring. The system transitions between different refresh modes: frequent full-bank refreshes during low workload, and reduced-frequency selective refreshes during high workload. This parameter adjustment optimizes the trade-off between data integrity assurance and current consumption.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10318187B2Memory controller and memory system including the same
Publication Date: 2019.06.11 SK HYNIX INC
  • US10318187B2 patent drawing
  • US10318187B2 patent drawing
  • US10318187B2 patent drawing

AI summary

A memory system includes: a memory device including a plurality of memory banks; and a memory controller suitable for monitoring a workload of the memory device and applying one of a first refresh command and a second refresh command to the memory device according to a result of the monitoring. In the memory device, the number of memory banks to be refreshed by the second refresh command may be greater than the number of memory banks to be refreshed by the first refresh command.