Memory Controller Replication Strategy for DRAM Random Access Delays
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Solution Overview
Problem
DRAM technology exhibits poor performance in applications with random access patterns due to intrinsic delays like tRC, tRRD, and tFAW, limiting its effectiveness in networking applications despite advantages in high density, low cost, and low power consumption.
Innovation Solution
Implementing a traffic-aware data replication mechanism where the number of replicas of information units in memory is determined by their size, allowing for optimized storage and access rates based on packet size and traffic needs, thereby improving memory architecture performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If DRAM memory is used for random access patterns in networking applications, then high density, low cost and low power consumption are achieved, but poor performance due to intrinsic delays like tRC, tRRD, and tFAW occurs
Solution Approach 1:
The memory system is segmented into multiple independent memory banks. By distributing packet descriptors across multiple banks, the system enables parallel access operations, allowing one bank to be accessed while another undergoes row cycle operations, thereby masking the tRC delay and improving overall memory access performance for random access patterns.
Solution Approach 2:
The system pre-allocates and pre-organizes packet descriptors in memory banks before actual packet processing occurs. By having descriptors ready and properly positioned in advance, the system minimizes the impact of random access delays when packets arrive, as the memory controller can immediately access the required descriptors without additional setup time.
2Speed
If data replication is increased to improve access rate, then memory access speed is improved, but memory space and power consumption increase
Solution Approach 1:
Different levels of data replication are applied locally based on specific criteria. Frequently accessed packet descriptors are replicated across multiple memory banks, while less frequently accessed descriptors use single-instance storage. This selective replication approach optimizes memory access speed for critical data while minimizing the overall memory space required and reducing power consumption compared to full replication of all data.
Data Source
AI summary
A memory architecture for storing information units, the memory architecture comprising a plurality of memory banks or a plurality of memory devices and a memory controller for initiating storage of an information unit and a number of replicas of the information unit in the memory banks or in the memory devices, the memory controller discriminating the replicas in dependence on a size of the information unit.