Memory Controller Reverse Erase for Hole Removal
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Solution Overview
Problem
Existing memory systems face challenges in maintaining optimal threshold voltage characteristics and data retention due to holes present in the space regions between memory cells, which affect the reliability and performance of semiconductor memory devices.
Innovation Solution
A memory system comprising semiconductor memory devices and a controller that counts erase operations for each memory block, identifying blocks with high erase counts and performing an operation to remove holes in the space regions by applying a set voltage to all word lines, thereby improving threshold voltage characteristics and data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If erase operations are performed on memory blocks, then data storage capacity is maintained, but holes accumulate in space regions causing threshold voltage degradation
Solution Approach 1:
The patent applies a reverse erase operation to memory blocks with high erase counts, converting the harmful effect of accumulated holes into a beneficial threshold voltage restoration. By detecting blocks exceeding a threshold erase count and applying reverse erase, the system recovers threshold voltage characteristics without requiring physical block replacement, thus transforming the degradation problem into a manageable maintenance process
Solution Approach 2:
The patent changes the electrical parameter state of memory blocks by applying reverse erase operations. When a memory block's erase count exceeds a predetermined threshold, the controller applies a reverse erase voltage to shift the threshold voltage back toward its initial state, effectively resetting the electrical parameter without erasing stored data
2Reliability
If reverse erase operation is applied to all memory blocks, then threshold voltage characteristics are restored, but power consumption and operation time increase
Solution Approach 1:
The patent applies reverse erase operations selectively only to memory blocks that meet specific criteria (erase count exceeding threshold, threshold voltage outside predetermined range) rather than uniformly to all blocks. This localized approach concentrates power consumption only where needed, maintaining reliability for affected blocks while minimizing overall energy waste on already-healthy blocks
Solution Approach 2:
The patent performs partial reverse erase operations only on the subset of memory blocks requiring intervention, rather than applying excessive action to all blocks. The controller identifies and treats only those blocks with erase counts above the threshold, achieving sufficient threshold voltage restoration with minimal power expenditure
3Reliability
If erase count monitoring and reverse erase operations are implemented, then data retention is improved, but device complexity increases
Solution Approach 1:
The patent implements a feedback mechanism where the controller continuously monitors erase counts and threshold voltage characteristics of memory blocks, comparing them against predetermined thresholds. When degradation is detected, the system automatically triggers reverse erase operations, creating a closed-loop control system that maintains reliability through automated monitoring and correction without requiring complex external management
Data Source
AI summary
A memory system and a method of operating the memory system are provided. The memory system includes a plurality of semiconductor memory devices each of which includes a plurality of memory blocks. The memory system also includes a controller configured to control the plurality of semiconductor memory devices to perform a program operation, a read operation, and an operation of removing a hole in a space region on a target memory block of the plurality of memory blocks. The controller controls the plurality of semiconductor memory devices to perform the operation of removing the hole in the space region on the target memory block when an erase count of the target memory block of the plurality of memory blocks is greater than a set value.