Memory Controller RMW Path That Skips ECC Decode Delays
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Solution Overview
Problem
Performing error correction decoding for all read data in memory devices causes delays, reducing the performance of storage devices, particularly in volatile memory devices like DRAM.
Innovation Solution
A memory controller that skips error correction decoding for read-modify-write operations by generating modified data before decoding, storing it in a history buffer, and performing the write operation without immediate decoding, allowing for faster data processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction decoding is performed for all read data, then data reliability is improved, but processing delay increases and performance decreases
Solution Approach 1:
The patent applies different error correction strategies to different data types: RMW read data skips error correction decoding while regular read data performs full error correction decoding. This localized differentiation resolves the contradiction by eliminating unnecessary error correction for RMW operations (reducing delay) while maintaining full error correction for regular reads (preserving reliability).
Solution Approach 2:
The system performs preliminary identification of RMW read commands before executing the read operation. By pre-marking RMW read commands and using this information during the read operation, the system can skip error correction decoding in advance for these specific operations, reducing processing delay while maintaining data reliability through alternative verification mechanisms.
2Speed
If error correction decoding is skipped for RMW read data, then processing speed is improved, but data accuracy may be compromised
Solution Approach 1:
The patent implements local quality by applying error correction selectively: RMW read data operates without error correction decoding to maximize speed, while regular read data undergoes full error correction to ensure accuracy. This localized approach resolves the contradiction by matching the error correction level to the specific operational requirements of each data type.
Solution Approach 2:
The system maintains copies of RMW write data in the history buffer alongside the read data flow. This copying mechanism allows the system to compare original write data with read data, providing an alternative verification method that maintains data accuracy without requiring error correction decoding, thus preserving processing speed.
3Reliability
If full error correction decoding is performed, then data integrity is maintained, but throughput decreases due to processing delays
Solution Approach 1:
The patent applies local quality by differentiating error correction requirements: RMW read data skips error correction to maximize throughput, while regular read data performs full error correction to maintain integrity. This selective approach resolves the contradiction by optimizing throughput for RMW operations without compromising overall data integrity.
Solution Approach 2:
The system performs preliminary identification and marking of RMW read commands before the read operation executes. This advance preparation allows the system to bypass error correction decoding for RMW operations, increasing throughput while maintaining data integrity through the preliminary command classification mechanism.
4Reliability
If error correction decoding is performed on all read operations, then bit flip errors are corrected, but operation delay increases
Solution Approach 1:
The patent implements local quality by applying error correction only where necessary: regular read operations perform full error correction to catch bit flip errors, while RMW read operations skip error correction since the data is immediately rewritten anyway. This resolves the contradiction by eliminating unnecessary error correction steps that would only add delay without providing benefit for RMW operations.
Solution Approach 2:
The system performs preliminary identification of RMW read commands and marks them accordingly before execution. This preliminary action enables the system to skip error correction decoding for marked RMW operations, reducing operation delay while maintaining error correction capability for non-RMW operations where bit flip correction is still necessary.
Data Source
AI summary
Provided herein may be a storage device. The storage device may include a command manager for receiving a RMW request, from a host device, to perform read, modify, and write operations on target data stored in a memory device and transmitting RMW read and write commands included in the RMW request to the memory device, a history buffer for storing RMW write data, a history buffer manager for generating first modified data corresponding to the target data based on the RMW write data, an error correction decoder for performing an error correction decoding operation for the target data from the memory device, and a read data manager for receiving the target data corresponding to the RMW read command from the memory device and transferring the target data to the history buffer and the error correction decoder.