Memory Controller Scan Voltage Segmentation for Deterioration Detection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing memory systems face challenges in rapidly and accurately determining the deterioration state of memory blocks, leading to reduced data reliability due to factors like time retention, read disturb, and temperature increases, which complicates the inspection of memory cell threshold voltage variations across large memory blocks.

Innovation Solution

A memory system with a memory controller that applies a plurality of scan voltages to memory pages to determine the number of memory cells within defined voltage ranges, allowing for the identification of deteriorated cells and proactive data relocation to maintain data integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If memory systems use conventional methods to determine deterioration state, then device complexity is reduced, but measurement precision and reliability of deterioration detection deteriorate

Engineering Contradiction:
Improvedeterioration state detection accuracyVSAvoidinspection process complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the memory block inspection process into multiple voltage range measurements. Instead of a single comprehensive check, the system divides the threshold voltage distribution into multiple ranges and measures each separately using different scan voltages. This segmentation enables more precise detection of deterioration patterns while maintaining manageable system complexity through modular measurement approaches.

Inventive Principle:
Principle #1Segmentation

2Reliability

If memory systems inspect all memory cells thoroughly, then reliability of deterioration detection is improved, but productivity and speed of inspection deteriorate

Engineering Contradiction:
Improvedeterioration detection reliabilityVSAvoidinspection speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies partial action by measuring only specific voltage ranges that are most indicative of deterioration rather than performing exhaustive measurements across all possible threshold voltage values. The system identifies and measures critical voltage ranges where deterioration manifestations occur, achieving high reliability detection without the overhead of complete exhaustive inspection of all memory cell states.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system changes measurement parameters by applying different scan voltages to probe different threshold voltage ranges. Instead of using a fixed measurement approach, the patent dynamically adjusts scan voltage levels to match the expected deterioration patterns, enabling rapid identification of problematic cells through parameter optimization rather than exhaustive checking.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If memory systems use multiple scan voltages to accurately determine threshold voltage ranges, then measurement precision is improved, but use of energy and time consumption increase

Engineering Contradiction:
Improvethreshold voltage measurement accuracyVSAvoidinspection time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements periodic measurement action by applying multiple scan voltages in a structured sequence rather than continuous monitoring. The system periodically switches between different scan voltage levels to measure different threshold voltage ranges, achieving comprehensive and precise measurement coverage through time-efficient periodic sampling instead of continuous exhaustive measurement.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11836366B2Memory system and method of operating the same
Publication Date: 2023.12.05 SK HYNIX INC
  • US11836366B2 patent drawing
  • US11836366B2 patent drawing
  • US11836366B2 patent drawing

AI summary

A memory controller may control a memory device including a plurality of memory blocks each including a plurality of pages. The memory controller may include a scan voltage controller configured to control the memory device to apply a plurality of scan voltages to any one page of the plurality of pages, a counter configured to obtain, based on sensed data obtained by reading the any one page using the plurality of scan voltages, the number of memory cells having a threshold voltage included in at least one voltage range defined by the plurality of scan voltages from among a plurality of memory cells included in the any one page, and a data manager configured to control the memory device to store data stored in a memory block including the any one page in another memory block, based on the number of memory cells.