Memory Controller Uncorrectable Error Recovery via Secondary Address
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Solution Overview
Problem
Existing memory controllers face challenges in efficiently handling uncorrectable errors during read operations, which can lead to data loss and system instability, particularly when errors occur in non-volatile memory devices used in computing systems.
Innovation Solution
A memory controller with a read operation controller that maps logical addresses to physical addresses, detects uncorrectable errors, and retrieves data from a secondary physical address previously mapped to the same logical address, ensuring data integrity and system stability by providing the host with corrected or alternative data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory controller retrieves data from the first physical address mapped to the target logical address, then the read operation is fast and efficient, but data loss occurs when uncorrectable errors are present
Solution Approach 1:
The memory controller performs preliminary error detection on data retrieved from the first physical address. When an uncorrectable error is detected, the controller has already prepared to access the second physical address (previously mapped to the same logical address) to retrieve alternative data, thereby preventing data loss without requiring host intervention.
Solution Approach 2:
The system maintains a copy of data at a second physical address that was previously mapped to the same logical address. When the primary data at the first physical address contains uncorrectable errors, the controller retrieves the copied data from the second physical address, providing data redundancy and enabling automatic error recovery.
2Reliability
If the memory controller implements error detection and secondary address retrieval mechanisms, then data integrity is improved, but the device complexity increases
Solution Approach 1:
The memory controller performs self-service error handling by automatically detecting uncorrectable errors in retrieved data and independently retrieving alternative data from a second physical address. This eliminates the need for host intervention in error recovery scenarios, simplifying the overall system architecture while maintaining high reliability.
Solution Approach 2:
The map data structure serves as an intermediary that tracks multiple physical addresses associated with each logical address. This intermediary mechanism enables the controller to efficiently locate alternative data sources without requiring complex error handling logic, as the mapping information is already organized and accessible.
3Device complexity
If the memory controller provides only error detection without secondary data retrieval, then the device complexity is low, but data loss occurs leading to system instability
Solution Approach 1:
The system prepares cushioning against data loss by maintaining alternative data copies at second physical addresses before errors occur. When uncorrectable errors are detected in the primary data path, the controller can immediately retrieve alternative data without system interruption, providing a safety buffer that prevents system instability.
Data Source
AI summary
A memory controller includes: a map data storage for storing map data; and a read operation controller for receiving, from a host, a read request and a target logical address corresponding to the read request, acquiring a first physical address mapped to the target logical address, based on the map data, and obtaining data stored at the first physical address. When an uncorrectable error is present in the data stored at the first physical address, the read operation controller acquires a second physical address previously mapped to the target logical address before the first physical address, obtains data stored at the second physical address, and provides the host with the data stored at the second physical address and information representing occurrence of the uncorrectable error.