Nonvolatile Memory Controller Sector Access Optimization
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Solution Overview
Problem
NAND-type flash memory systems face challenges in efficiently executing read/write operations across multiple sectors due to slower cell read/write speeds, which limits their performance in mass storage applications.
Innovation Solution
A nonvolatile memory system with a memory controller that successively executes read/write operations across plural sectors within a selected data area using a command and sector count/sector address from a host device, optimizing data access through logical block addressing and multiple operation modes (PNA, VFA, MDA) to enhance performance and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If NAND-type flash memory is used for mass storage, then unit cell area is reduced and mass storage capability is improved, but read/write speed per cell becomes slower
Solution Approach 1:
The patent combines multiple memory cells that can be accessed simultaneously within a physical page, merging their individual read/write operations into a single simultaneous operation. This allows the system to compensate for slower per-cell speeds by processing multiple cells in parallel, thereby maintaining mass storage capability while improving overall data transfer rates.
Solution Approach 2:
The patent implements a read ahead function that pre-loads data into a buffer memory before it is actually needed by the host. This preliminary action allows the system to prepare data in advance, compensating for the slower per-cell read speed by having data ready when requested, thus improving effective data access speed without sacrificing storage capacity.
2Productivity
If read/write operations are executed across multiple sectors, then data access efficiency is improved, but operation complexity increases
Solution Approach 1:
The patent implements a sector skip function that automatically detects and skips defective sectors during read/write operations without requiring manual intervention or complex error handling protocols. The system self-manages the operation by identifying bad sectors and adjusting the access pattern, thereby improving data access efficiency across multiple sectors while keeping the control mechanism relatively simple.
Solution Approach 2:
The patent introduces a buffer memory as an intermediary between the host and the multiple memory sectors. This buffer absorbs the complexity of coordinating read/write operations across multiple sectors, allowing the host to interact with a simplified interface while the buffer manages the complex sector-by-sector operations, thus improving overall data access efficiency without exposing the complexity to the host system.
3Speed
If successive read/write operations are executed across plural sectors, then data access speed is improved, but the impact of slower cell read/write speed becomes more significant
Solution Approach 1:
The read ahead function pre-loads data into buffer memory before it is needed, creating a pool of pre-fetched data that can be served quickly to the host. This preliminary action improves data access speed by having data ready in advance, while the buffer acts as a cushion that absorbs variations in cell read/write speed, thereby maintaining performance reliability even when individual cell operations are slow.
Solution Approach 2:
By combining multiple cell read/write operations into simultaneous parallel operations within a physical page, the system achieves higher effective data access speed. The parallel processing of multiple cells compensates for the slower per-cell speed, and the coordinated execution of these merged operations maintains reliability through synchronized error handling and verification across all cells involved in the simultaneous operation.
Data Source
AI summary
A nonvolatile memory system comprises a nonvolatile memory having a plurality of data areas; and a memory controller operative to control read and write operations to the nonvolatile memory. The memory controller successively executes read/write operations to plural sectors within a selected data area in the nonvolatile memory in accordance with a command and a sector count and sector address fed from a host device.