Memory Controller Seed Generation for Data Reliability
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Solution Overview
Problem
Current semiconductor memory devices face challenges in enhancing operating speed and reliability, particularly in data storage and retrieval processes, due to limitations in error correction and data processing methods.
Innovation Solution
A memory system comprising a semiconductor memory device with a controller that generates combination seeds through logical operations on derandomizing and randomizing seeds, along with error information, to correct page data and perform program operations efficiently across buffer and main memory blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error correction methods are used in semiconductor memory devices, then data reliability is maintained, but operating speed and data processing time are reduced
Solution Approach 1:
The patent applies preliminary action by performing error correction operations on page data before it is programmed into the main memory block. The controller executes error correction on data read from the buffer memory block, generates corrected page data, and then programs this corrected data into the main memory block. This advance error correction prevents the need for time-consuming error checking and correction during data retrieval operations, thereby improving operating speed while maintaining data reliability.
Solution Approach 2:
The patent segments the memory system into distinct functional blocks: a buffer memory block for temporary data storage, a main memory block for permanent storage, and a controller that performs error correction operations. This segmentation allows error correction to be performed independently on page data before it is transferred to the main memory block, enabling parallel processing and improving overall operating speed without compromising data reliability.
2Quantity of substance
If multiple program operations are performed on main memory block, then data storage capacity is improved, but processing time and operational complexity increase
Solution Approach 1:
The patent performs preliminary error correction operations on page data before it is programmed into the main memory block during multiple program operations. The controller reads page data from the buffer memory block, executes error correction, and programs the corrected data into the main memory block. This advance preparation reduces the time required for each program operation and prevents the need for repeated error checking, thereby reducing overall processing time while maintaining data storage capacity.
Solution Approach 2:
The patent enables continuous data processing by performing error correction operations on page data while it is being transferred from the buffer memory block to the main memory block. The controller continuously executes error correction on incoming page data and immediately programs the corrected data into the main memory block, maintaining a continuous flow of data processing and eliminating idle time between operations.
Data Source
AI summary
Provided is a memory system including a semiconductor memory device including a buffer memory block suitable for storing page data, and including a main memory block, and a controller suitable for generating a combination seed by performing a logical operation on a randomizing seed, a derandomizing seed, and error information, and for providing the generated combination seed to the semiconductor memory device.