Memory Controller Segment Mapping for Nonvolatile Write Reduction
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Solution Overview
Problem
Current memory systems face inefficiencies in updating mapping information in nonvolatile memory, leading to unnecessary writing and increased overhead due to the inability to overwrite data, requiring separate areas for updates and resulting in multiple write operations.
Innovation Solution
A memory controller and method that groups updated segments into page data and stores them in one page of nonvolatile memory, using an address mapping table and segment mapping table to manage physical addresses, reducing unnecessary writing and write operations by managing mapping entries in segment units smaller than pages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If mapping information is stored in nonvolatile memory using traditional page-based writing, then data can be retained without power, but unnecessary write operations increase due to inability to overwrite
Solution Approach 1:
The patent segments mapping information into smaller units called segments, which are further divided into sub-segments. This segmentation allows selective updating of only the changed portions rather than writing entire pages, reducing unnecessary write operations while maintaining data integrity in nonvolatile memory.
Solution Approach 2:
The patent merges multiple sub-segments into larger segments and combines multiple segments into page data structures. This hierarchical merging enables efficient grouping of updated mapping entries, allowing them to be written together in optimized batches to nonvolatile memory, improving write operation efficiency.
2Reliability
If separate areas are allocated for updated mapping information, then data integrity is maintained, but memory overhead increases
Solution Approach 1:
By segmenting mapping information into manageable sub-segments and segments, the patent enables precise tracking of changes. Only updated segments need to be written to separate areas in nonvolatile memory, reducing the quantity of data requiring separate storage while maintaining data integrity through selective updating.
Solution Approach 2:
The patent applies partial action by updating only the necessary portions of mapping information rather than entire pages. This selective approach reduces memory overhead by avoiding redundant storage of unchanged data while ensuring data integrity through targeted updates of only the changed segments.
3Ease of operation
If mapping information is updated in page units, then writing is simplified, but the number of write operations increases due to granular updates
Solution Approach 1:
The patent segments mapping information into sub-segments and segments that can be independently tracked and updated. This segmentation maintains writing simplicity by providing clear structural boundaries while reducing write operation count by allowing grouping of multiple segment updates into fewer page write operations.
Solution Approach 2:
The patent merges multiple updated segments into consolidated page data structures before writing to nonvolatile memory. This merging maintains ease of operation by preserving the page-based writing interface while significantly reducing the number of write operations needed, as multiple segment updates are combined into single or fewer page writes.
Data Source
AI summary
A memory controller, an operating method of the memory controller, and a storage device including the memory controller are disclosed. The memory controller includes: a memory configured to store an address mapping table and a segment mapping table; and a mapping data management module configured to select at least two updated segments among a plurality of segments included in the address mapping table as page data to be stored in one page of a nonvolatile memory, wherein each of the plurality of segments includes a plurality of mapping entries representing mapping information between logical addresses and physical addresses, and wherein the segment mapping table includes physical addresses representing areas in which each of the plurality of segments is stored in the nonvolatile memory.