Memory Controller Segment-Based Map Search Pipelining
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Solution Overview
Problem
Current memory systems for portable electronic devices face inefficiencies in data processing due to sequential activation and reading of memory chips, leading to increased operation times and reduced performance during data transfer.
Innovation Solution
A memory system and operating method that employs a controller to search and trigger memory chips in segments, overlapping searches and readings to optimize data transfer by sequentially activating and reading from multiple chips based on read times and map data, thereby improving pipelining and reducing idle times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If memory chips are activated and read sequentially, then the control complexity is reduced, but the data processing speed and operation time increase
Solution Approach 1:
The patent segments map data into multiple segments and divides the searching process into sequential stages, where each stage searches a specific segment and triggers corresponding memory chips. This segmentation allows parallel processing of multiple chips while maintaining controlled complexity through staged execution.
Solution Approach 2:
The controller performs preliminary searching of map data segments before actually triggering memory chips. By pre-identifying which chips need to be activated through segment-based map searching, the system prepares the processing pipeline in advance, enabling faster subsequent data retrieval and transfer operations.
2Productivity
If memory chips are activated and read in parallel, then the data transfer efficiency is improved, but the operation time for searching and triggering increases
Solution Approach 1:
Map data is divided into multiple segments that can be searched in parallel stages. Each segment corresponds to specific memory chips, allowing the controller to identify and trigger multiple chips simultaneously while reducing the search burden for each individual stage.
Solution Approach 2:
The patent implements pipelined operation where searching of subsequent map segments occurs concurrently with data reading from previously triggered chips. This continuous overlapping of search and read operations eliminates idle time and maintains productive action throughout the data transfer process.
3Reliability
If the controller searches entire map data before triggering chips, then the accuracy of chip selection is ensured, but the operation time for data transfer increases
Solution Approach 1:
The map data searching process is segmented into multiple stages, where each stage searches a specific portion of the map data and triggers corresponding chips. This segmentation maintains accurate chip selection by systematically covering the entire map space while enabling parallel processing and overlapping operations to reduce total duration.
Solution Approach 2:
The controller performs preliminary searching of map segments and triggers memory chips before the complete map search is finished. By initiating chip triggering based on partial map segment searches and overlapping subsequent searches with data reading operations, the system reduces total operation time while maintaining accurate chip identification.
Data Source
AI summary
A memory system may include: a memory device including a plurality of pages having a plurality of memory cells coupled to a plurality of word lines and suitable for storing read data and write data requested from a host, a plurality of memory blocks each including the pages, a plurality of planes each including the memory blocks, and a plurality of memory chips each including the planes; and a controller suitable for searching map data of the read data corresponding to a read command received from the host on a basis of a plurality of segments, triggering memory chips corresponding to the map data searched through the searches of the respective segments, reading data stored in the triggered memory chips, and transferring the read data to the host.