Memory Controller Segmentation for Transaction Prioritization

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Solution Overview

Problem

Existing memory management systems in computer processing systems do not effectively prioritize memory transactions, leading to retries and stalls due to limited resources, especially when multiple high-priority tasks contend for memory access without clear indications of importance.

Innovation Solution

Implementing a memory controller with a reserved portion to prioritize high-priority transactions by allocating resources dynamically, allowing the system to execute higher priority tasks while dropping lower priority tasks, and using a priority-based decision-making process to manage resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory controller resources are shared among all transactions without prioritization, then resource utilization is maximized, but high-priority transactions experience delays and retries due to controller stalls

Engineering Contradiction:
Improvehigh-priority transaction completionVSAvoidmemory controller throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The memory controller is segmented into a reserved portion and a shared portion. The reserved portion is dedicated exclusively to high-priority transactions, while the shared portion handles both high and low-priority transactions. This segmentation ensures that high-priority transactions have guaranteed resources and cannot be delayed by low-priority traffic, resolving the contradiction between reliability and productivity.

Inventive Principle:
Principle #1Segmentation

2Productivity

If memory controller queues are filled with low-priority transactions, then overall memory usage is optimized, but high-priority transactions are dropped or retried due to full queues

Engineering Contradiction:
Improvememory usage optimizationVSAvoidtransaction completion guarantee
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The controller queues are segmented into a reserved queue and a shared queue. The reserved queue is dedicated to high-priority transactions with sufficient capacity to prevent drops, while the shared queue handles other transactions. This segmentation ensures that high-priority transactions are never dropped due to queue fullness, maintaining reliability while still optimizing overall memory usage through the shared queue.

Inventive Principle:
Principle #1Segmentation

3Productivity

If memory controller retries transactions due to busyness, then resource utilization is maintained, but latency increases and performance degrades

Engineering Contradiction:
Improveresource utilizationVSAvoidtransaction latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

By segmenting the controller into reserved and shared portions, high-priority transactions are directed to the reserved portion which has guaranteed capacity. This eliminates retries for high-priority transactions, reducing latency significantly. The shared portion continues to maintain high resource utilization by handling all transaction types, thus resolving the contradiction between productivity and time loss.

Inventive Principle:
Principle #1Segmentation

4Reliability

If a reserved portion of the memory controller is allocated for high-priority transactions, then high-priority transaction reliability is improved, but overall device complexity increases

Engineering Contradiction:
Improveprioritized transaction processingVSAvoidmemory controller structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The controller is divided into reserved and shared portions with clear demarcation. This segmentation provides a simple and elegant solution to the reliability-complexity contradiction. The reservation mechanism uses straightforward priority-based routing logic without requiring complex arbitration or dynamic resource allocation algorithms, thus maintaining relative simplicity while significantly improving high-priority transaction reliability.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10073629B2Memory transaction prioritization
Publication Date: 2018.09.11 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10073629B2 patent drawing
  • US10073629B2 patent drawing
  • US10073629B2 patent drawing

AI summary

Examples of techniques for memory transaction prioritization for a memory are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: The method may further include: allocating, by a memory controller, a reserved portion of the memory controller to process prioritized transactions; receiving, by the memory controller, a request transaction from a processor to the memory, wherein the request transaction comprises a priority; determining, by the memory controller, whether the priority of the request transaction is above a priority threshold; and responsive to determining that the priority of the request transaction is above the priority threshold, executing the request using the reserved portion of the memory controller.