Memory Controller Selective Burst Writes for Cache Data Blocks

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing memory systems face inefficiencies in writing data, leading to slow data transfer speeds and increased power consumption due to the need for multiple burst writes, even when only some data blocks have changed, resulting in the writing of invalid data.

Innovation Solution

A data writing method that differentiates changed and unchanged data blocks, skipping writes for unchanged blocks and performing burst writes only on changed blocks, optimizing data transfer and reducing power consumption by sending change information from the cache to the memory controller to determine which data blocks require writing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple consecutive burst writes are performed to write data of one cache line into the memory device, then the data can be written into the memory device, but the writing speed of valid data is low and power consumption increases due to writing invalid data

Engineering Contradiction:
Improvedata writing speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The cache line is divided into multiple data blocks, and change information is generated for each data block to indicate whether data in that block has changed. The memory controller selectively performs burst writes only on changed data blocks, segmenting the write operation to avoid writing invalid data and reduce power consumption while maintaining writing speed for valid data.

Inventive Principle:
Principle #1Segmentation

2Reliability

If burst writes are performed without considering whether data blocks are changed, then the memory device can be written, but invalid data is written leading to increased power consumption and reduced performance

Engineering Contradiction:
Improvedata writing reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

Change information is generated in advance for each data block to indicate whether data has changed before the burst write operation. This preliminary identification allows the memory controller to selectively write only changed data blocks, ensuring reliable data writing while avoiding the power consumption penalty of writing invalid data.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If BC4 technology is used to reduce burst write operations, then fewer burst writes are performed, but invalid data is still written in some burst writes leading to increased power consumption

Engineering Contradiction:
Improvedata writing efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

Change information is generated for each individual data block within the cache line, allowing the memory controller to identify which specific data blocks have changed. This local-level tracking enables selective burst writes on only the changed blocks, improving writing efficiency while reducing power consumption by avoiding writes to unchanged blocks, even when using BC4 technology.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP2998867B1Data writing method and memory system
Publication Date: 2019.09.18 HUAWEI TECH CO LTD
  • EP2998867B1 patent drawingFigure 1
  • EP2998867B1 patent drawingFigure 2~3
  • EP2998867B1 patent drawingFigure 4

AI summary

Embodiments of the present invention provide a data writing method and a memory system. The method is applied to a memory system including at least a memory controller and a memory device, and the method includes: receiving, by the memory controller, change information sent by a cache, wherein the change information is information that is generated after the cache divides a first to-be-written cache line cache line of a last level cache LLC into at least one data block and that is used to indicate whether data in each data block is changed; for each changed data block in which data is changed, sending, by the memory controller according to the change information, a corresponding column address and corresponding data to the memory device; and for a data block in which data is not changed, skipping performing, by the memory controller according to the change information, a write. Therefore, objectives to quickly write valid data, reduce power consumption of a memory system, and improve performance of the memory system are achieved.