Memory Controller Separate Transaction Tables Real-Time QoS

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Solution Overview

Problem

Existing memory controllers face challenges in efficiently processing real-time and non-real-time memory transactions due to the complexity of storing and arbitrating between them in a single transaction table, which can lead to difficulties in meeting quality-of-service (QoS) requirements for real-time transactions.

Innovation Solution

Implementing separate transaction tables and selection logic for real-time and non-real-time transactions, with a dedicated arbitration circuit that enforces QoS policies by prioritizing real-time transactions when necessary to prevent latency violations, and using a credit-based arbitration system with distinct credit pools for each type of transaction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single transaction table is used to store both real-time and non-real-time memory requests, then the device complexity is reduced, but the quality of service for real-time transactions deteriorates due to difficulty in meeting QoS requirements

Engineering Contradiction:

Improvetransaction table structureVSAvoidQoS requirement fulfillment

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent divides the single transaction table into two separate transaction tables: one dedicated to real-time memory requests and another for non-real-time memory requests. This segmentation allows independent management and arbitration of each transaction type, ensuring that real-time transactions can meet their QoS requirements without being blocked by non-real-time transactions, while maintaining overall system organization.

Inventive Principle:

Principle #1Segmentation

2Reliability

If separate transaction tables are used for real-time and non-real-time transactions, then the quality of service for real-time transactions is improved, but the device complexity increases

Engineering Contradiction:

ImproveQoS requirement fulfillmentVSAvoidtransaction table structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

3Device complexity

If a single arbitration circuit is used for both real-time and non-real-time transactions, then the device complexity is reduced, but the speed of real-time transaction processing deteriorates due to inability to prioritize

Engineering Contradiction:

Improvearbitration circuit structureVSAvoidreal-time transaction processing

Core Design Contradiction:

Device complexityVSSpeed

Solution Approach 1:

The arbitration functionality is segmented into two separate arbitration circuits: one dedicated to real-time transactions and another for non-real-time transactions. The real-time arbitration circuit can prioritize and quickly arbitrate real-time transactions, ensuring they meet timing requirements, while the non-real-time arbitration circuit handles less time-critical transactions, thereby improving overall real-time processing speed.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different arbitration strategies and priorities are applied locally to each transaction type. The real-time arbitration circuit implements quality-of-service policies that prioritize real-time transactions, while the non-real-time arbitration circuit uses different arbitration logic suitable for less time-critical operations, optimizing performance for each category.

Inventive Principle:

Principle #3Local quality

4Reliability

If real-time transactions are prioritized in arbitration, then the quality of service for real-time transactions is improved, but the productivity of non-real-time transactions deteriorates due to reduced access opportunities

Engineering Contradiction:

Improvereal-time QoS enforcementVSAvoidnon-real-time transaction throughput

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

By separating real-time and non-real-time transactions into different tables and arbitration circuits, the patent ensures that real-time transactions receive priority treatment in their dedicated arbitration circuit without completely blocking non-real-time transactions. The non-real-time arbitration circuit continues to process transactions independently, maintaining productivity while real-time QoS requirements are met through the separate real-time arbitration path.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS11900146B2Memory controller with separate transaction table for real time transactions

Publication Date: 2024.02.13 APPLE INC

AI summary

A memory controller with a separate transaction table for real-time transactions is disclosed. A system includes a plurality of agents and a memory controller configured to receive real-time and non-real-time memory requests from ones of the plurality of agents. The memory controller includes a real-time incoming transaction table configured to store those memory requests received from a subset of the plurality of agents that are real-time memory requests, and a non-real-time incoming transaction table configured to store those memory requests received from the subset of the plurality of agents that are non-real-time memory requests. The memory controller further includes an arbitration circuit configured to select a memory request from among memory requests stored in the real-time and non-real-time incoming transaction tables and further configured to enforce a quality of service policy for the real-time memory requests.