Nonvolatile Memory Controller Sequential Write Management

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Solution Overview

Problem

Conventional recordable memory devices face challenges in maintaining real-time recording performance due to data fragmentation and write errors, which lead to reduced memory performance and potential data loss during retry operations.

Innovation Solution

A recordable memory device with a controller that manages data writing from the next physical address after the final recorded data, using a nonvolatile semiconductor memory with a system area for address conversion, eliminating the need for an address conversion table in the user area and enabling continuous data transfer without temporary stoppages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If data is managed using a file allocation table (FAT) file system, then data can be organized and accessed, but data fragmentation occurs during write or erase operations, reducing memory performance

Engineering Contradiction:
Improvedata organization and accessVSAvoidmemory performance
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent extracts the address conversion function from the user-area FAT file system and relocates it to the system area managed by the controller. This separation allows the user area to maintain simple sequential addressing while the controller handles address conversion, preventing fragmentation and maintaining high write performance.

Inventive Principle:
Principle #2Taking out (Extraction)

2Productivity

If write operations are performed on fragmented NAND blocks, then data can be recorded, but overhead of write time occurs and memory performance is reduced

Engineering Contradiction:
Improvedata recording capabilityVSAvoidwrite time overhead
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The controller performs preliminary address conversion and data relocation operations before the host initiates write operations. By pre-organizing data in the system area with proper address mapping, the controller eliminates the need for time-consuming fragmentation handling during actual write operations, reducing write time overhead.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If error notification is given to the host apparatus during real-time recording, then errors can be detected, but data transfer is temporarily stopped and data may be lost

Engineering Contradiction:
Improveerror detectionVSAvoidreal-time recording continuity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The controller acts as an intermediary between the NAND flash memory and the host apparatus, absorbing and handling errors internally without notifying the host. This allows the controller to manage retries and error correction in the background while maintaining continuous data transfer, ensuring both error detection and real-time recording continuity.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Adaptability or versatility

If an address conversion table is maintained in the user area, then address mapping can be performed, but chip cost increases

Engineering Contradiction:
Improveaddress mapping capabilityVSAvoidchip cost
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The controller is designed with universal address conversion capabilities that serve multiple functions: managing system area operations, handling user area access, performing address mapping, and managing error recovery. This multi-functionality eliminates the need for a separate address conversion table in the user area, reducing chip cost while maintaining full address mapping capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8489802B2Recordable memory device which writes data to reformatted user area of nonvolatile semiconductor memory
Publication Date: 2013.07.16 KIOXIA CORP
  • US8489802B2 patent drawing
  • US8489802B2 patent drawing
  • US8489802B2 patent drawing

AI summary

A recordable memory device includes a nonvolatile semiconductor memory, and a controller controlling the nonvolatile semiconductor memory based on a recordable system. The nonvolatile semiconductor memory has a user area capable of directly making an access from a host, and a system area managed by the controller. A data writing to the reformatted user area of the nonvolatile semiconductor memory executes from a start point which is an unused area after the final physical address of old recordable data recorded in the user area before the reformat. The data writing executes from a start point which is a top physical address in the user area, when the start point exceeds the final physical address in the user area.