Memory Controller Signal Line Frequency Adjustment for Audio Noise Reduction
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Solution Overview
Problem
Current memory systems, particularly those using NAND flash memory, face challenges in reproducing music information with high quality due to noise generation from frequent signal line de-assertion and assertion, which affects audio devices connected to them.
Innovation Solution
The memory system incorporates a memory controller that adjusts the frequency of signal line de-assertion and assertion during data transmission, allowing it to operate in either a normal mode or a high-quality mode, with the latter reducing noise by performing these operations at a lower frequency when reproducing music information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the memory controller frequently de-asserts and asserts the signal line during data transmission, then data transmission speed is improved, but noise is generated that degrades music reproduction quality
Solution Approach 1:
The memory controller dynamically adjusts its operating mode between normal mode and quiet mode based on the host device's operation type. During music reproduction, it switches to quiet mode with reduced signal line assertion/de-assertion frequency, while maintaining normal mode for other operations to ensure data transmission speed
Solution Approach 2:
The patent changes the frequency parameter of signal line de-assertion and assertion operations. In quiet mode, the controller reduces the frequency of these operations compared to normal mode, thereby reducing noise generation while still maintaining necessary data transmission functionality
2Productivity
If the memory controller operates in normal mode with high frequency signal line de-assertion and assertion, then productivity is improved, but music reproduction quality deteriorates due to noise
Solution Approach 1:
The memory controller implements dynamic mode switching between normal mode (high productivity) and quiet mode (low noise). The controller detects when the host device is performing music reproduction and automatically transitions to quiet mode, reducing signal line assertion/de-assertion frequency to minimize noise propagation while maintaining operational functionality
Data Source
AI summary
A memory system is connectable to a host device, and includes a nonvolatile memory, a signal line connected to the nonvolatile memory, and a memory controller. The memory controller is connected to the signal line, and repeatedly performs de-assertion and assertion of the signal line at a first frequency while transmitting or receiving data to or from the nonvolatile memory. The memory controller, in response to receiving a first command from the host, repeatedly performs the de-assertion and the assertion of the signal line at a second frequency lower than the first frequency while transmitting or receiving the data to or from the nonvolatile memory.