Memory Controller Signal Transfer Rate Differentiation

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Solution Overview

Problem

The increasing clock frequency and data rate in memory device and memory controller communication lead to significant performance degradation due to bit errors in command and address signals, which control the operation of memory devices and result in lengthy delays.

Innovation Solution

Transferring command and address signals at a lower rate than data signals, using predefined command sequence codes, and incorporating error correction mechanisms to enhance reliability without increasing the number of parallel lines or manufacturing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If command and address signals are transferred at the same high rate as data signals, then the data transfer performance is maximized, but the reliability of command and address signal transfer deteriorates due to increased bit errors

Engineering Contradiction:

Improvedata transfer rateVSAvoidcommand signal transfer reliability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent applies different transfer rates to different signal types within the same communication interface. Data signals are transferred at a first (higher) rate while command and address signals are transferred at a second (lower) rate, allowing each signal type to have optimized quality characteristics for its specific requirements

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The communication interface is segmented into separate channels or time slots for different signal types. Command/address signals and data signals are transmitted separately with different rate parameters, enabling independent optimization of reliability for control signals and speed for data signals

Inventive Principle:

Principle #1Segmentation

2Speed

If the clock frequency and data rate are increased continuously to meet growing computing capacities, then the data transfer speed is improved, but the number of bit errors increases causing performance degradation

Engineering Contradiction:

Improvedata transfer speedVSAvoidsignal integrity

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The patent changes the transfer rate parameter specifically for command and address signals, setting it lower than the data signal rate. This parameter differentiation maintains high overall transfer speed while ensuring signal integrity for control commands by reducing their exposure to high-frequency noise and interference

Inventive Principle:

Principle #35Parameter changes

3Reliability

If corrupted frames are retransferred a second time, then the reliability of frame transfer is improved, but the performance of the communication channel deteriorates considerably

Engineering Contradiction:

Improveframe transfer reliabilityVSAvoidcommunication channel performance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent implements error prevention measures before transmission by using a lower, more reliable transfer rate for command and address signals. This preliminary protective measure reduces the likelihood of corruption requiring retransmission, thereby maintaining channel performance while ensuring reliability

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS7587655B2Method of transferring signals between a memory device and a memory controller

Publication Date: 2009.09.08 POLARIS INNOVATIONS LTD

AI summary

Method and apparatus for communication (e.g., transmitting and/or receiving) command, address and data signals from a memory device to a memory controller or vice versa. The data signals are transferred with a first rate and command signals and/or address signals are transferred with a second rate lower than a first rate. Additionally or alternatively a command sequence code identifying a command sequence from a predefined group of command sequences is transferred with the first or with the second rate.