Memory Controller SLC Mapping Backup for Power Loss Recovery

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Memory systems face challenges in efficiently recovering physical-logical address mapping information lost due to power loss, as this information is typically stored in volatile DRAM and is not reliably preserved during power outages.

Innovation Solution

The proposed solution involves a memory system architecture that utilizes a combination of single-level cell (SLC) and multi-level cell (MLC) memory blocks, where physical-logical address mapping information is stored in a DRAM and temporarily copied to an SLC memory block, allowing for recovery of this information during power loss by scanning the SLC block.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If physical-logical address mapping information is stored only in volatile DRAM, then the memory system achieves fast access speed, but the information is lost when power loss occurs

Engineering Contradiction:
Improveaccess speedVSAvoiddata retention during power loss
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by copying physical-logical address mapping information from volatile DRAM to non-volatile SLC memory blocks before power loss can occur. The controller continuously maintains copies of mapping information in SLC blocks, ensuring that even if power is lost, the mapping data is already preserved in non-volatile storage and can be recovered without loss.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If physical-logical address mapping information is copied to SLC memory block, then power loss recovery is enabled, but the device complexity increases

Engineering Contradiction:
Improvepower loss recovery capabilityVSAvoidmemory architecture complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing SLC memory blocks that serve dual functions: they act as regular storage blocks for user data and simultaneously serve as backup storage for physical-logical address mapping information. This multi-functionality reduces the need for separate dedicated backup structures, thereby limiting the increase in device complexity while still providing power loss recovery capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Loss of time

If scanning is performed on SLC memory block for recovery, then power loss recovery time is reduced, but the productivity during normal operation is affected

Engineering Contradiction:
Improverecovery timeVSAvoidnormal operation efficiency
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-copying mapping information to SLC blocks during normal operation before power loss occurs. This allows the recovery process to simply read from the already-prepared SLC blocks rather than performing extensive scanning or reconstruction, thereby reducing recovery time without significantly impacting normal operation productivity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies copying by maintaining duplicate copies of physical-logical address mapping information in SLC memory blocks alongside the primary DRAM storage. This copying mechanism enables rapid recovery by simply reading the copied data from SLC blocks after power restoration, minimizing recovery time while allowing normal operations to continue with minimal interruption.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS11334448B2Memory system and operating method thereof
Publication Date: 2022.05.17 SK HYNIX INC
  • US11334448B2 patent drawing
  • US11334448B2 patent drawing
  • US11334448B2 patent drawing

AI summary

There are provided a memory system and an operating method thereof. A method for operating a memory system includes: performing a program operation on a first page of a first page group included in a first memory block and storing physical-logical address mapping information on the first page in a physical-logical address mapping information storing section; performing a program operation on a second page of the first page group included in the first memory block and storing physical-logical address mapping information on the second page in the physical-logical address mapping information storing section; and copying the physical-logical address mapping information on the first and second pages of the first page group, which are stored in the physical-logical address mapping information storing section, to a second memory block.