Memory Controller Sleep State Management

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Solution Overview

Problem

Memory devices face challenges in efficiently managing power states and data transfer between volatile and non-volatile memory, leading to increased processing time and potential data loss during transitions between sleep modes.

Innovation Solution

A memory device with a controller that saves sleep state information in the host device's main memory, allowing it to determine the appropriate return processing command without querying the host, and configures data storage to reduce power consumption and access times by saving data in the main memory during low power sleep states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is saved to non-volatile memory during power shutdown, then data loss is prevented, but processing time increases during return operations

Engineering Contradiction:
Improvedata loss preventionVSAvoidreturn processing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The controller performs preliminary actions by saving sleep state information to the host device's main memory before entering low power sleep mode. This advance preparation enables the controller to determine the appropriate return processing command without querying the host during wake-up, thereby reducing return processing time while maintaining data loss prevention through proper data storage in non-volatile memory

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller creates a copy of the sleep state information and stores it in the host device's main memory. This copying mechanism allows the controller to retrieve return processing commands from the stored copy without requiring communication with the host during wake-up, thus reducing processing time while ensuring data integrity through non-volatile memory storage

Inventive Principle:
Principle #26Copying

2Reliability

If the controller queries the host to determine return processing commands, then accurate return processing is ensured, but processing time increases

Engineering Contradiction:
Improvereturn processing accuracyVSAvoidquery processing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The controller performs preliminary action by storing the sleep state information and appropriate return processing commands in the host device's main memory before entering low power sleep mode. This advance preparation eliminates the need for time-consuming queries to the host during wake-up, while ensuring return processing accuracy through the stored command information

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller enables self-service by autonomously determining the return processing command from the previously stored sleep state information in the host's main memory, without requiring external querying or intervention from the host device during the wake-up process, thus reducing processing time while maintaining accuracy

Inventive Principle:
Principle #25Self-service

3Speed

If data is stored in volatile memory during operation, then access speed is improved, but power consumption increases during sleep states

Engineering Contradiction:
Improvedata access speedVSAvoidpower consumption during sleep
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The controller performs preliminary action by saving sleep state information to the host device's main memory before entering low power sleep mode. This enables the system to transition volatile memory data to non-volatile storage during wake-up without requiring volatile memory to remain powered during sleep, thus reducing power consumption while maintaining fast access speeds during active operation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller changes the storage parameter by transitioning data between volatile memory (for fast access during operation) and non-volatile memory (for low power consumption during sleep). By dynamically changing the storage state based on operational requirements, the system achieves both fast access speeds during active use and reduced power consumption during sleep states

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10467020B2Memory device, and information-processing device
Publication Date: 2019.11.05 KIOXIA CORP
  • US10467020B2 patent drawing
  • US10467020B2 patent drawing
  • US10467020B2 patent drawing

AI summary

According to one embodiment, the memory device includes a non-volatile memory, a volatile memory, and a controller. The controller carries out the transition to two different sleep states depending on a sleep instruction from the host device and saves sleep state information indicating the sleep state after the transition to the host-side storage device. Upon receiving a return instruction from the host device, the controller carries out return processing in accordance with the sleep state information stored in the host-side storage device.