Memory Controller Sleep-Wakeup State Signal Mechanism
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Solution Overview
Problem
Rewritable non-volatile memory storage apparatuses face challenges in efficiently reducing power consumption during sleep mode and quickly returning to operational mode after waking up, as existing systems lack effective mechanisms to differentiate between activation and sleep-wakeup procedures.
Innovation Solution
A memory storage apparatus comprising a rewritable non-volatile memory module, a first circuit, a memory controller, and a power management circuit, where the first circuit outputs a state signal that transitions from a first to a second state, allowing the memory controller to determine the appropriate procedure (activation or sleep-wakeup) and the power management circuit controls voltage supply based on host system signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the memory storage apparatus stops supplying power to reduce power consumption during sleep mode, then power saving is improved, but the ability to quickly wake up and return to operational mode deteriorates
Solution Approach 1:
The system performs preliminary actions by saving essential data to non-volatile memory before entering sleep mode, and maintains a wake-up flag in non-volatile memory that allows the system to quickly determine whether to execute a normal activation procedure or a sleep-wakeup procedure upon returning from sleep mode, eliminating the need for full system initialization
Solution Approach 2:
A wake-up flag mechanism acts as an intermediary between the power management circuit and the memory controller, storing the state information in non-volatile memory to differentiate between cold boot and wake-up scenarios, enabling the system to quickly resume operation without full initialization
2Device complexity
If the memory storage apparatus cannot identify whether to execute normal activation or sleep-wakeup procedure, then system simplicity is maintained, but operational efficiency deteriorates
Solution Approach 1:
A wake-up flag in non-volatile memory serves as an intermediary indicator that communicates the system's previous state to the memory controller upon activation, enabling the controller to automatically select the appropriate procedure (normal activation or sleep-wakeup) without complex additional circuitry
Solution Approach 2:
The power management circuit automatically sets the wake-up flag based on the system's operational state before entering sleep mode, and the memory controller automatically determines the correct activation procedure by checking the wake-up flag, enabling the system to self-manage the activation process without external intervention
Data Source
AI summary
A memory storage apparatus having a rewritable non-volatile memory module, a first circuit, a memory controller and a power management circuit is provided. The first circuit outputs a state signal and keeps the state signal in a first state when the first circuit is enabled, and then the first circuit keeps the state signal in a second state after a predetermined condition is satisfied. When the memory controller receives a first signal, the power management circuit stops supplying an output voltage to the rewritable non-volatile memory module and the memory controller. Additionally, when the memory controller is enabled, the memory controller determines whether the state signal is in the first state. If true, the memory controller performs a first procedure; and if not, the memory controller performs a second procedure.