Memory Controller State Switching for Data Transfer

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Solution Overview

Problem

Current semiconductor memory devices face inefficiencies in managing data movement between main memory and secondary storage, leading to increased processor load and performance degradation due to direct access requirements and lack of efficient data swapping mechanisms.

Innovation Solution

A semiconductor memory device configuration that includes a first memory, a second memory, and a switch, controlled by a processor, which switches between states to enable data movement between the memories without direct processor access, allowing for reduced processor load and improved data transfer efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the processor directly accesses main memory and swap file for data swapping, then data transfer can be performed, but processor load increases and performance degrades

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoidprocessor load
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent introduces a memory controller as an intermediary device between the processor and the memory system. The memory controller autonomously manages data swapping between main memory and swap file without requiring processor intervention. This mediator handles the complex data transfer operations, freeing the processor from these tasks and reducing processor load while maintaining efficient data transfer through dedicated memory control logic.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If the processor manages data swapping between main memory and swap file, then data movement is possible, but the memory bus becomes congested and transfer speed decreases

Engineering Contradiction:
Improvedata transfer speedVSAvoidmemory bus utilization
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent extracts the data swapping function from the processor and relocates it to the memory controller. By taking out this function from the main processing path, the memory bus is freed from processor-mediated transfer overhead. The memory controller directly manages memory bus transactions, simplifying bus utilization and enabling faster data transfer speeds without processor intervention.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of operation

If direct processor access is used for data swapping, then data movement between memories is achieved, but system performance degrades due to processor involvement

Engineering Contradiction:
Improvedata swapping capabilityVSAvoidsystem performance
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent implements self-service by enabling the memory controller to autonomously perform data swapping operations without processor involvement. The memory controller independently manages data movement between main memory and swap file, making operational decisions without external control. This self-service approach maintains ease of data swapping while significantly improving system performance by eliminating processor bottlenecks.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9940029B2Semiconductor memory device that switches between states and moves data in accordance with a current state
Publication Date: 2018.04.10 KIOXIA CORP
  • US9940029B2 patent drawing
  • US9940029B2 patent drawing
  • US9940029B2 patent drawing

AI summary

According to an embodiment, a semiconductor memory device includes a first memory, a second memory, a switch, and a controller. The switch switches between various states including between a first state and a second state. In the first state, the first memory is connected to a host device that reads data from and writes data to the first memory and the second memory is not connected to the host device. In the second state, the first memory is connected to the second memory and the host device is connected to neither the first memory nor the second memory. The controller directs, upon receiving a movement command from the host device, the switch to switch to the second state to move data between the first memory and the second memory.