Memory Controller Static Image Detection Self-Refresh Power Reduction

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Solution Overview

Problem

In mobile electronic devices, power consumption remains high during the display of static screen images due to continuous memory access by the memory controller, despite no data processing or writing, as existing power-saving modes like pre-charge power down still require clock signal switching, which consumes power and has high latency when exiting self-refresh mode.

Innovation Solution

Implementing static image detection logic to communicate the static image condition to the memory controller, enabling it to enter a self-refresh mode, which disables memory clocking circuits and reduces power consumption by utilizing a small portion of memory bandwidth during static screen conditions, allowing higher latency without performance drops.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If pre-charge power down mode is used to reduce power consumption during static image display, then power consumption is reduced, but clock signal switching is still required which consumes power and creates high latency when exiting the mode

Engineering Contradiction:
Improvepower consumptionVSAvoidlatency when exiting power down mode
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The patent extracts the clock signal driving function from the memory controller during static image display conditions. By detecting that the display data is static and the line buffer is full, the system stops generating clock signals to the memory device, removing the source of power consumption associated with clock signal switching while maintaining the ability to quickly resume normal operation when dynamic data is detected.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The memory device maintains its own internal state and data integrity without requiring external clock signals during static display conditions. The system leverages the fact that static data does not change, allowing the memory device to essentially service itself by maintaining its state without active clocking from the controller, thereby reducing power consumption without sacrificing data availability.

Inventive Principle:
Principle #25Self-service

2Reliability

If continuous memory access is performed by the memory controller during static image display, then data availability is ensured, but power consumption remains high due to continuous clock signal switching

Engineering Contradiction:
Improvedata availabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic control of clock signal generation based on real-time detection of display data characteristics. The memory controller continuously monitors whether the display data is static or dynamic and adjusts its operation accordingly - stopping clock signals during static conditions and resuming them when dynamic data is detected, thereby dynamically optimizing the balance between power consumption and data availability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system employs feedback mechanisms where the memory controller detects the static nature of display data and the full state of the line buffer, then uses this information to control whether clock signals are generated to the memory device. This feedback loop ensures that power consumption is reduced only when data availability is not compromised, maintaining reliability while optimizing energy efficiency.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7800621B2Apparatus and methods for control of a memory controller
Publication Date: 2010.09.21 ATI TECHNOLOGIES ULC
  • US7800621B2 patent drawing
  • US7800621B2 patent drawing
  • US7800621B2 patent drawing

AI summary

Apparatus and methods are disclosed for controlling the memory controller and, in particular, controlling signaling of the memory controller to a memory via memory interface during a static screen condition. An apparatus includes static image detection logic that is configured to detect when image data being displayed by a display controller is static and to communication detection of static image data to the display controller. The apparatus also includes control logic within the display controller responsive to the static image detection logic, where the control logic is configured to detect a level of a line buffer within the display controller and to send a signal to a memory controller directing the memory controller to issue a signal to a memory to enter a self-refresh mode, thereby turning off at least one memory clocking circuit within the memory controller. A corresponding method is also disclosed.