Memory Controller Status Check Delay Optimization
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Solution Overview
Problem
The performance degradation of memory systems occurs due to varying program times across different memory dies, leading to inefficient data storage and retrieval operations.
Innovation Solution
A memory controller that loads and updates status check delay information for each memory die, determining the optimal time to send a status check command based on a weighted moving average of program times, minimizing performance degradation by synchronizing operations across memory dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the memory controller uses a fixed status check timing for all memory dies, then the control logic is simple, but performance degradation occurs due to varying program times across different memory dies
Solution Approach 1:
The patent changes the status check delay parameter from a fixed value to a variable value that is specific to each memory die. The memory controller stores separate status check delay information for each memory die and uses the appropriate delay value based on the target memory die, allowing optimization of program operation performance for each die while maintaining manageable control logic through systematic parameter organization.
2Reliability
If the memory controller waits for the maximum program time before status check, then all memory dies can be checked, but time is wasted on faster memory dies
Solution Approach 1:
The patent applies local quality by assigning different status check delay characteristics to different memory dies based on their individual program time characteristics. Each memory die has its own status check delay information that reflects its specific program time, allowing the memory controller to optimize the waiting time for each die individually rather than using a uniform delay that would cause unnecessary waiting for faster dies.
3Measurement precision
If the memory controller frequently updates status check delay information, then operation characteristics are accurately reflected, but system overhead increases
Solution Approach 1:
The patent implements periodic action by updating the status check delay information at regular intervals or under specific conditions (such as when the memory device is in idle state or after a certain number of program operations). This periodic update approach maintains accurate operation characteristic information while controlling the frequency of updates to avoid excessive system overhead and maintain manageable update operation complexity.
Data Source
AI summary
A memory system, a memory controller and an operating method are disclosed. By determining, based on status check delay information, a time point at which a status check command is sent to a memory device and updating the status check delay information while the memory device is in an idle state, it is possible to minimize a degradation in the performance of a program operation for the memory device including a plurality of memory dies, and it is possible to reflect a variation in an operation characteristic of the memory device, on the program operation.