Memory Controller Striping Engine Lookup Tables

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Solution Overview

Problem

Current memory systems face challenges in achieving optimal write performance due to complex striping operations, which often require extensive calculations and can lead to increased latency and power consumption.

Innovation Solution

A memory system with a controller that employs a striping engine and lookup tables to efficiently determine the arrangement of data chunks across multiple memory dies, reducing the need for complex calculations by pre-defining addresses based on queued orders, thereby improving write performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If complex striping operations with extensive calculations are used to determine data chunk arrangement, then data can be distributed across multiple memory dies, but write latency increases and power consumption increases

Engineering Contradiction:
Improvewrite performanceVSAvoidwrite latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-defining striping patterns and storing them in lookup tables before actual write operations. The controller pre-calculates and stores the arrangement of data chunks across memory dies in advance, so that during write operations, it only needs to perform simple table lookups instead of complex real-time calculations. This resolves the contradiction by preparing the striping configuration beforehand, thereby reducing write latency while still achieving data distribution across multiple memory dies.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If complex striping operations with extensive calculations are used to determine data chunk arrangement, then data can be distributed across multiple memory dies, but power consumption increases

Engineering Contradiction:
Improvewrite performanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by pre-defining striping patterns and storing them in lookup tables before actual write operations. The controller pre-calculates and stores the arrangement of data chunks across memory dies in advance, so that during write operations, it only needs to perform simple table lookups instead of complex real-time calculations. This resolves the contradiction by preparing the striping configuration beforehand, thereby reducing power consumption during write operations while still achieving data distribution across multiple memory dies.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If lookup tables with pre-defined addresses are used to simplify striping operations, then calculation complexity is reduced and write performance improves, but controller memory requirements increase

Engineering Contradiction:
Improvewrite performanceVSAvoidcontroller memory
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent applies segmentation by dividing the lookup table into multiple smaller tables, each handling specific aspects of the striping operation. Instead of using one large comprehensive lookup table, the controller uses multiple specialized tables that can be selectively accessed based on the specific write operation requirements. This resolves the contradiction by breaking down the memory requirement into manageable segments while still providing the pre-calculated striping information needed for high write performance.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11650929B2Memory system and operation method thereof
Publication Date: 2023.05.16 MIMIRIP LLC
  • US11650929B2 patent drawing
  • US11650929B2 patent drawing
  • US11650929B2 patent drawing

AI summary

A memory system includes: a memory device including a plurality of memory dies including the plurality of planes; and a controller configured to store data in a plurality of stripes each including physical pages of different planes and a plurality of unit regions, the controller comprising: a processor configured to queue write commands in a write queue, and select, among the plurality of stripes, a stripe in which data chunks corresponding to the write commands are to be stored; and a striping engine configured to receive queued orders of the write commands, and output, by referring to a lookup table, addresses of unit regions, in which the data chunks are to be arranged, to the processor, wherein the processor in configured to control the memory device to store the data chunks in the unit regions corresponding to the outputted addresses of the selected stripe.