Memory Controller Sub-Bitmap Mapping Table Loading

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing nonvolatile memory systems face inefficiencies in garbage collection operations due to the need to scan spare areas, leading to increased overhead and reduced performance.

Innovation Solution

A memory controller method that generates a valid page layout based on a loaded mapping table without scanning the spare area, using sub-bitmaps to identify valid pages and perform garbage collection efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory controller scans the spare area to identify valid pages during garbage collection, then it can ensure accurate identification of valid data, but the overhead increases and performance decreases

Engineering Contradiction:

Improveaccuracy of valid page identificationVSAvoidgarbage collection performance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-storing valid page information in a sub-bitmap before garbage collection operations. The sub-bitmap is updated in real-time during program and erase operations, so when garbage collection needs to occur, the valid page information is already prepared and readily available, eliminating the need for time-consuming spare area scans

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent creates a copy of the essential valid page information from the spare area into a compact sub-bitmap structure. This copied information is stored in a more efficient format that can be quickly accessed during garbage collection, separating the critical validation data from the full spare area content

Inventive Principle:

Principle #26Copying

2Loss of information

If the memory controller loads the entire mapping table for garbage collection, then it can obtain complete mapping information, but the memory usage and processing overhead increase

Engineering Contradiction:

Improvecompleteness of mapping informationVSAvoidprocessing overhead

Core Design Contradiction:

Loss of informationVSLoss of energy

Solution Approach 1:

The patent extracts only the necessary portion of the mapping table information by using the sub-bitmap to identify and load only the mapping entries corresponding to valid pages. This selective extraction avoids loading unnecessary mapping data, reducing memory bandwidth consumption and processing overhead while maintaining completeness of required information

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the mapping table access into two stages: first using the compact sub-bitmap to identify which mapping entries are needed, then selectively loading only those specific mapping entries. This segmentation separates the identification phase from the data retrieval phase, improving efficiency

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS9529705B2Nonvolatile memory system including nonvolatile memory device and memory controller that loads a mapping table on a sub-bitmap and method of operating the memory controller

Publication Date: 2016.12.27 SAMSUNG ELECTRONICS CO LTD

AI summary

A method of operating a memory controller controlling a nonvolatile memory device including a user area and a meta area is provided. The method includes selecting a source block among a plurality of memory blocks included in the user area, loading a mapping table stored in the meta area on the basis of a sub-bitmap of the selected source block, and generating a valid page layout constituted by valid pages among pages included in the source block on the basis of the loaded mapping table. The sub-bitmap includes information of a valid mapping table with respect to the selected source block.